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AD7617

Data Sheet

Rev. 0 | Page 36 of 51

SEQUENCER

The AD7617 features a highly configurable on-chip sequencer.

The functionality and configuration of the sequencer is

dependent on the mode of operation of the AD7617.

In hardware mode, the sequencer is sequential only. The sequencer

always starts converting at Channel V0A and Channel V0B and

converts each subsequent channel up to the configured end

channel.

In software mode, the sequencer has additional functionality

and configurability. The sequencer stack has 32 uniquely

configurable sequence steps, allowing any channel order to be

programmed. Additionally, any Channel VxA input can be

paired with any Channel VxB input or diagnostic channel.

The sequencer can be operated with or without the burst

function enabled. With the burst function enabled, only one

CONVST pulse is required to convert every channel in a sequence.

With burst mode disabled, one CONVST pulse is required for

every conversion step in the sequence. See the Burst Sequencer

section for additional details on operating in burst mode.

HARDWARE MODE SEQUENCER

In hardware mode, the sequencer is controlled by the SEQEN pin

and the CHSELx pins. The sequencer is enabled or disabled when

the AD7617 is released from full reset. The logic level of the

SEQEN pin when the RESET pin is released determines whether

the sequencer is enabled or disabled (see Table 18 for settings).

After the RESET pin is released, the function is fixed and a full

reset via the RESET pin is required to exit the function and set

up an alternative configuration.

Table 18. Hardware Mode Sequencer Configuration

SEQEN

Interface Mode

Sequencer disabled

Sequencer enabled

When the sequencer is enabled, the logic levels of the CHSELx pins

determine the channels selected for conversion in the sequence.

The CHSELx pins at the time RESET is released determine the

initial settings for the channels to convert in the sequence. To

reconfigure the channels selected for conversion thereafter, set

the CHSELx pins to the required setting for the duration of the

final BUSY pulse before the current conversion sequence is

complete. See Figure 62 for further details.

Table 19. CHSELx Pin Decoding Sequencer

Channel Selection Input Pin

Analog Input Channels for

Sequential Conversion

CHSEL0

CHSEL1

CHSEL2

V0x only

V0x to V1x

V0x to V2x

V0x to V3x

V0x to V4x

V0x to V5x

V0x to V6x

V0x to V7x

SOFTWARE MODE SEQUENCER

In software mode, the AD7617 contains a 32-layer fully

configurable sequencer stack. Control of the sequencer is

achieved by programming the configuration register and

sequencer stack registers via the parallel or serial interface.

Each stack step can be individually programmed to pair any input

from Channel VxA to any input from Channel VxB, or any

diagnostic channel can be selected for conversion. The sequencer

depth can be set to any length from 1 to 32 layers. The sequencer

depth is controlled via the SSRENx bit. Set the SSRENx bit in

the sequencer stack register corresponding to the last step required.

The channels to convert are selected by programming the ASELx

and BSELx bits in each sequence stack register for the depth

required.

The sequencer is activated by setting the SEQEN bit in the

configuration register to 1.

Figure 62. Hardware Mode Sequencer Configuration

RESET

SEQEN

CONVST

BUSY

CHx

CHy

CHz

CHSEL2 TO CHSEL0

A/B0

A/Bx

A/B0

A/By

A/B0

DATA

INITIAL SETUP

CONFIGURE POINT

A/Bx-1

A/By-1

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