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AD9633 Datasheet(PDF) 11 Page - Analog Devices |
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AD9633 Datasheet(HTML) 11 Page - Analog Devices |
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11 / 42 page ![]() AD9633 Data Sheet Rev. B | Page 10 of 41 D0–x D0+x FCO– DCO+ CLK+ VIN±x CLK– DCO– FCO+ MSB N– 9 D8 N – 9 D8 N – 8 D7 N – 8 D6 N – 8 D7 N – 9 D6 N – 9 D5 N – 9 D4 N – 9 D3 N – 9 D2 N – 9 D1 N – 9 D0 N – 9 MSB N – 8 D5 N – 8 tA tDATA tEH tFCO tFRAME tPD tCPD tEL N – 1 N Figure 7. Wordwise DDR, One-Lane, 1× Frame, 10-Bit Output Mode SYNC CLK+ tHSYNC tSSYNC Figure 8. SYNC Input Timing Requirements |
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