AD9637 datasheet(28/41 Pages) AD

28 / 41 page

Data Sheet

AD9637

Rev. A | Page 27 of 40

BUILT-IN OUTPUT TEST MODES

The AD9637 includes a built-in test feature designed to enable

verification of the integrity of each data output channel, as well

as to facilitate board level debugging. Various output test options

are provided to place predictable values on the outputs of the

AD9637.

OUTPUT TEST MODES

The output test options are described in Table 17 at Address 0x0D.

When an output test mode is enabled, the analog section of the

ADC is disconnected from the digital back-end blocks and the

test pattern is run through the output formatting block. Some of

the test patterns are subject to output formatting, and some are

not. The PN generators from the PN sequence tests can be reset

by setting Bit 4 or Bit 5 of Register 0x0D. These tests can be

performed with or without an analog signal (if present, the

analog signal is ignored), but they do require an encode clock.

For more information, see the AN-877 Application Note,

Interfacing to High Speed ADCs via SPI.

AD9637 Datasheet(PDF) 28 Page - Analog Devices