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AD9637 Datasheet(PDF) 32 Page - Analog Devices |
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AD9637 Datasheet(HTML) 32 Page - Analog Devices |
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32 / 41 page ![]() Data Sheet AD9637 Rev. A | Page 31 of 40 MEMORY MAP REGISTER TABLE The AD9637 uses a 3-wire interface and 16-bit addressing and, therefore, Bit 0 and Bit 7 in Register 0x00 are set to 0, and Bit 3 and Bit 4 are set to 1. When Register 0x00, Bit 5 is set high, the SPI enters a soft reset, where all of the user registers revert to their default values and Bit 2 is automatically cleared. Table 17. Memory Map Register Table Reg. Addr. (Hex) Parameter Name Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (LSB) Default Value (Hex) Comments Chip Configuration Registers 0x00 SPI port configuration 0 = SDO active LSB first Soft reset 1 = 16-bit address 1 = 16-bit address Soft reset LSB first 0 = SDO active 0x18 The nibbles are mirrored so that LSB or MSB first mode registers correctly. The default for the ADCs is 16-bit mode. 0x01 Chip ID (global) 8-bit chip ID, Bits[7:0] AD9637 0x93 = octal 12-bit 40 MSPS/80 MSPS serial LVDS Read only 0x93 Unique chip ID that is used to differentiate devices; read only. 0x02 Chip grade (global) Open Speed grade ID, Bits[6:4] 001 = 40 MSPS 100 = 80 MSPS Open Open Open Open Read only Unique speed grade ID that is used to differentiate graded devices; read only. Device Index and Transfer Registers 0x04 Device Index 2 Open Open Open Open Data ChannelH Data Channel G Data Channel F Data Channel E 0xF Bits are set to determine which device on chip receives the next write command. The default is all devices on chip. 0x05 Device Index 1 Open Open Clock Channel DCO Clock Channel FCO Data ChannelD Data Channel C Data Channel B Data Channel A 0x3F Bits are set to determine which device on chip receives the next write command. The default is all devices on chip. 0xFF Transfer Open Open Open Open Open Open Open Initiate override 0x00 Set resolution/ sample rate override. Global ADC Functions 0x08 Power modes (global) Open Open External power- down pin function 0 = full power- down 1 = standby Open Open Open Internal power-down mode 00 = chip run 01 = full power-down 10 = standby 11 = reset 0x00 Determines various generic modes of chip operation. 0x09 Clock (global) Open Open Open Open Open Open Open Duty cycle stabilizer 0 = off 1 = on 0x01 Turns duty cycle stabilizer on or off. |
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