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MSP3401G Datasheet(PDF) 33 Page - Micronas |
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MSP3401G Datasheet(HTML) 33 Page - Micronas |
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33 / 104 page ![]() PRELIMINARY DATA SHEET MSP 34x1G Micronas 33 00 29hex Automatic Volume Correction (AVC) Loudspeaker Channel bit[15:12] 00hex AVC off (and reset internal variables) 08hex AVC on bit[11:8] 08hex 8 sec decay time 04hex 4 sec decay time 02hex 2 sec decay time 01hex 20 ms decay time (should be used for approx. 100 ms after channel change) AVC 00 01hex 00 30hex Balance Loudspeaker Channel Balance Headphone Channel bit[15:8] Linear Mode 7Fhex Left muted, Right 100% 7Ehex Left 0.8%, Right 100% ... 01hex Left 99.2%, Right 100% 00hex Left 100%, Right 100% FFhex Left 100%, Right 99.2% ... 82hex Left 100%, Right 0.8% 81hex Left 100%, Right muted bit[15:8] Logarithmic Mode 7Fhex Left −127 dB, Right 0 dB 7Ehex Left −126 dB, Right 0 dB ... 01hex Left −1 dB, Right 0 dB 00hex Left 0 dB, Right 0 dB FFhex Left 0 dB, Right −1dB ... 81hex Left 0 dB, Right −127 dB 80hex Left 0 dB, Right −128 dB bit[7:0] Balance Mode 00hex linear 01hex logarithmic Positive balance settings reduce the left channel without affecting the right channel; negative settings reduce the right channel leaving the left channel unaffected. BAL_MAIN BAL_AUX Table 3–11: Write Registers on I2C Subaddress 12hex, continued Register Address Function Name |
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