24-Bit, 156 kSPS, 112 dB Sigma-Delta ADC

with On-Chip Buffers and Serial Interface

AD7765

Rev. A

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FEATURES

High performance, 24-bit Σ-Δ ADC

115 dB dynamic range at 78 kHz output data rate

112 dB dynamic range at 156 kHz output data rate

156 kHz maximum fully filtered output word rate

Pin-selectable oversampling rate (128× and 256×)

Low power mode

Flexible SPI

Fully differential modulator input

On-chip differential amplifier for signal buffering

On-chip reference buffer

Full band low-pass finite impulse response (FIR) filter

Overrange alert pin

Digital gain correction registers

Power-down mode

Synchronization of multiple devices via SYNC

APPLICATIONS

pin

Daisy chaining

Data acquisition systems

Vibration analysis

Instrumentation

GENERAL DESCRIPTION

The AD7765 is a high performance, 24-bit sigma-delta (Σ-Δ)

analog-to-digital converter (ADC). It combines wide input

bandwidth, high speed, and performance of 112 dB dynamic

range at a 156 kHz output data rate. With excellent dc

specifications, the converter is ideal for high speed data

acquisition of ac signals where dc data is also required.

Using the AD7765 eases the front-end antialias filtering

requirements, simplifying the design process significantly. The

AD7765 offers pin-selectable decimation rates of 128× and

256×. Other features include an integrated buffer to drive the

reference, as well as a fully differential amplifier to buffer and

level shift the input to the modulator.

An overrange alert pin indicates when an input signal has

exceeded the acceptable range. The addition of internal gain

and internal overrange registers makes the AD7765 a compact,

highly integrated data acquisition device requiring minimal

peripheral components.

The AD7765 also offers a low power mode, significantly

reducing power dissipation without reducing the output data

rate or available input bandwidth.

FUNCTIONAL BLOCK DIAGRAM

REFGND

BUF

MCLK

GND

OVERRANGE

DEC_RATE

SYNC

RESET/PWRDWN

FSO SCO

SDI

SDO

FSI

DIFF

MULTIBIT

Σ-Δ

MODULATOR

RECONSTRUCTION

DECIMATION

FIR FILTER ENGINE

AD7765

INTERFACE LOGIC AND

OFFSET AND GAIN

CORRECTION REGISTERS

Figure 1.

The differential input is sampled at up to 40 MSPS by an analog

modulator. The modulator output is processed by a series of

low-pass filters. The external clock frequency applied to the

AD7765 determines the sample rate, filter corner frequencies,

and output word rate.

The AD7765 device boasts a full band on-board FIR filter. The

full stop-band attenuation of the filter is achieved at the Nyquist

frequency. This feature offers increased protection from signals

that lie above the Nyquist frequency being aliased back into the

input signal bandwidth.

The reference voltage supplied to the AD7765 determines the

input range. With a 4 V reference, the analog input range is

±3.2768 V differential, biased around a common mode of

2.048 V. This common-mode biasing can be achieved using

the on-chip differential amplifier, further reducing the external

signal conditioning requirements.

The AD7765 is available in a 28-lead TSSOP package and is

specified over the industrial temperature range of −40°C

to +85°C.

Table 1. Related Devices

Part No.

Description

AD7760

2.5 MSPS, 100 dB, parallel output, on-chip buffers

AD7762

625 kSPS, 109 dB, parallel output, on-chip buffers

AD7763

625 kSPS, 109 dB, serial output, on-chip buffers

AD7764

312 kSPS, 109 dB, serial output, on-chip buffers

AD7766

128/64/32 kSPS, 8.5 mW, 109 dB SNR

AD7767

128/64/32 kSPS, 8.5 mW, 109 dB SNR