CS4103 datasheet(18/24 Pages) NSC

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Revision 1.0

3.5

VENDOR SPECIFIC: PAGE 7, PORTS[0:2]

The Vendor Specific page is reserved for vendor use. It

may contain per-port registers but this implementation

does not require port selection to access user defined reg-

isters. The Vendor Specific page is accessible by setting

the Page_select field in the Base register at Address 07h to

0111b.

Table 3-10. Vendor Specific: Page 7 Bit Map

Address

01234

567

08h-0Eh

RSVD

0Fh

RSVD

PD[0]

PD[1]

RSVD

Table 3-11. Vendor Specific: Page 7 Registers

Bits

Name

Access

Reset

Description

Addresses 08h-0Eh

Page 7, Port[n], Register-0 through Register-6

0:7

RSVD

00h

Reserved: Do not set bits in these fields. Setting bits in these fields may

cause noncompliant or unspecified behavior.

Addresses 0Fh

Page 7, Port[n], Register-7

0:2

RSVD

00h

Reserved: Do not set bits in these fields. Setting bits in these fields may

cause noncompliant or unspecified behavior.

3:4

PD[1:0]

Power Down Mode: The CS4103 will transition to a low power state defined

by these bits when the PHY-Link interface is disabled and the PHY ports are

in the disabled, disconnected or suspended state.

00 = No Power Down.

01 = Stop PLL and 50 MHz clock.

10 = Stop 50 MHz clock.

11 = Stop Crystal, PLL, and 50 MHz clock.

5:7

RSVD

00h

Reserved: Do not set bits in these fields. Setting bits in these fields may

cause noncompliant or unspecified behavior.

CS4103 Datasheet(PDF) 18 Page - National Semiconductor (TI)

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