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CS4103 Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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CS4103 Datasheet(HTML) 5 Page - National Semiconductor (TI) |
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5 / 24 page ![]() Revision 1.0 5 www.national.com 2.0 Signal Definitions This section defines the signals and external interface of the CS4103. Figure 2-1 shows the pins organized by their functional groupings (internal test and electrical pins are not shown). 2.1 PIN ASSIGNMENT The tables in this section use several common abbrevia- tions. Table 2-1 lists the mnemonics and their meanings. Figure 2-2 on page 6 shows the pin assignment for the CS4103 with Tables 2-2 and 2-3, on pages 7 and 8, listing the pin assignments sorted by pin number and alphabeti- callybysignalname. Section 2.2 "Signal Descriptions" starting on page 9 pro- vides a description for each signal within its associated functional group. Figure 2-1. Signal Groups Table 2-1. Pin Type Definitions Mnemonic Definition I Input Pin I/O Bidirectional Pin OOutput t/s TRI-STATE Signal VDD 2.5V Core Power Supply VDDIO 3.3V I/O Power Supply VSS Ground Connection TPA[0:2]+ TPA[0:2]– TBA[0:2]+ TPB[0:2]– TPBIAS[0:2] DATA[0:7] CTRL[0:1] LREQ SCLK LPS LOCKIND PHY-Link Interface Geode™ CS4103 Transceiver/ DIRECT XI XO Clock/Crystal and LNKON PC0 PC1 PC2 Power to/from Bus CPS 1394 Cable Connections RESET# Reset Connection |
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