Nonvolatile, Quad, 8-Bit DACs with 2-Wire Serial

Interface

12

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Serial Interface

wire serial interface consisting of a bidirectional serial

data line (SDA) and a serial clock line (SCL). SDA and

SCL facilitate bidirectional communication between the

MAX5115/MAX5116 and the master at rates up to

400kHz (Figure 4). The master (typically a microcon-

troller) initiates data transfer on the bus and generates

SCL. SDA and SCL require pullup resistors (2.4k

Ω or

greater; see the Typical Operating Circuit). Optional

resistors (24

Ω) in series with SDA and SCL protect the

device inputs from high-voltage spikes on the bus lines.

Series resistors also minimize crosstalk and undershoot

of the bus signals.

The MAX5115/MAX5116 are compatible with existing

SDA has an open-drain output. The Typical Operating

The general call address is ignored, and CBUS formats

are not supported. The devices’ addresses are com-

bit address formats are supported.

Bit Transfer

One data bit transfers during each SCL rising edge.

Nine clock cycles are required to transfer the data into

or out of the MAX5115/MAX5116. The data on SDA

must remain stable during the high period of the SCL

clock pulse. Changes in SDA while SCL is high are

read as control signals (see the START and STOP

Conditions section). Both SDA and SCL idle high.

START and STOP Conditions

The master initiates a transmission with a START condi-

tion (S), a high-to-low transition on SDA with SCL high.

The master terminates a transmission with a STOP condi-

tion (P), a low-to-high transition on SDA while SCL is high

(Figure 5). A START condition from the master signals

the beginning of a transmission to the MAX5115/

MAX5116. The master terminates transmission by issu-

ing a STOP condition. The STOP condition frees the bus.

If a REPEATED START condition (Sr) is generated

instead of a STOP condition, the bus remains active.

Early STOP Conditions

The MAX5115/MAX5116 recognize a STOP condition at

any point during transmission except if a STOP condi-

tion occurs in the same high pulse as a START condi-

REPEATED START Conditions

A REPEATED START (Sr) condition is used when the

not want to relinquish control of the bus. The

MAX5115/MAX5116 serial interface supports continu-

ous write operations with an Sr condition separating

them. Continuous read operations require Sr conditions

because of the change in direction of data flow.

S

Sr

ACK

SCL

SDA

PS

PARAMETERS ARE MEASURED FROM 30% TO 70%.

Figure 4. 2-Wire Serial-Interface Timing Diagram

SP

Sr

SCL

SDA

Figure 5. START and STOP Conditions