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MAX5116EEE Datasheet(PDF) 17 Page - Maxim Integrated Products |
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MAX5116EEE Datasheet(HTML) 17 Page - Maxim Integrated Products |
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17 / 19 page ![]() Nonvolatile, Quad, 8-Bit DACs with 2-Wire Serial Interface ______________________________________________________________________________________ 17 Applications Information DAC Linearity and Offset Voltage The output buffer can have a negative input offset volt- age that would normally drive the output negative, but with no negative supply, the output remains at GND (Figure 10). Determine linearity using the end-point method, measuring between code 10 (0A hex) and code 240 (F0 hex) after calibrating the offset and gain error (Figure 10). External Voltage Reference The MAX5115 features two reference inputs for each DAC (REFH_ and REFL_). The MAX5116 uses a single reference for all four DACs (REFH and REFL). REFH_ sets the full-scale voltage, while REFL_ sets the zero code output. The MAX5115 has a 460k Ω typical input impedance that is independent of the code. The MAX5116 has a 115k Ω typical input impedance that is independent of the code. Power Sequencing The voltage applied to REFH_ and REFL_ should not exceed VDD at any time. If proper power sequencing is not possible, connect an external Schottky diode between REFH_, REFL_, and VDD to ensure compliance with the absolute maximum ratings. Do not apply signals to the digital inputs before the device is fully powered. Power-Supply Bypassing and Ground Management Digital or AC transient signals on GND can create noise at the analog output. Return GND to the highest-quality ground available. Bypass VDD with a 0.1µF capacitor, located as close to the device as possible. Bypass REFH_ and REFL_ to GND with 0.1µF capacitors. Careful PC board ground layout minimizes crosstalk between the DAC outputs and digital inputs. DAC CODE OUTPUT VOLTAGE (V) 1111 1111 1000 0000 0000 0001 0000 0000 VREFL_ Table 9. Unipolar Code Output Voltage O DAC CODE NEGATIVE OFFSET OUTPUT VOLTAGE Figure 10. Effect of Negative Offset (Single Supply) 255 256 ×− + () __ _ VV V REFH REFL REFL 128 256 ×− + ( __ _ VV V REFH REFL REFL 256 − + () __ _ VV V REFH REFL REFL |
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