Nonvolatile, Quad, 8-Bit DACs with 2-Wire Serial

Interface

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15

Mute drives the selected DAC output to the correspond-

ing REFL_ voltage. The volatile DAC registers retain data

and the output returns to its previous state when mute is

disabled. The MAX5116 also features an asynchronous

MUTE input that mutes all DACs simultaneously.

The volatile and nonvolatile registers remain active

while the MAX5115/MAX5116 are in mute and power-

down modes. Writing to or reading from the volatile or

nonvolatile registers does not remove the MAX5115/

MAX5116 from mute or power-down mode. Writing or

transferring data to the volatile registers while the

device is muted or powered down updates the DAC

outputs to the new state upon exiting mute or power-

down mode.

Mute/Power-Down Register and Operation

Separate nonvolatile and volatile control registers store

and update the state of the mute/power-down mode for

each DAC. Tables 7 and 8 show how to access and

control each register. Register access is gained by set-

ting control bits C3–C0 to 0100. Bits C5 and C4 indi-

cate whether the nonvolatile or volatile control register

is accessed. The volatile register maintains data while

NONVOLATILE

(NV)

VOLATILE

(V)

FUNCTION

00

Transfer data from NVREG_ to

VREG_

0

1

Write to VREG_

1

0

Write to NVREG_

1

1

Write to NVREG and VREG_

Table 2. Volatile and Nonvolatile Write

Selection

R3

R2

R1

R0

FUNCTION

0

0

0

0

DAC0

0

0

0

1

DAC1

0

0

1

0

DAC2

0

0

1

1

DAC3

1

1

1

1

All DACs*

Table 3. DAC Write Selection

*This option is only valid for a write to all volatile registers.

DATA BYTE

ADDRESS

BYTE

COMMAND BYTE

MSB

LSB

COMMAND

S

T

A

R

T

R/

W

A

C

K

C

7

C

6

C

5

C

4

C

3

C

2

C

1

C

0

A

C

K

D

7

D

6

D

5

D

4

D

3

D

2

D

1

D

0

A

C

K

STOP

Write VREG_

S

0

0

0

0

1

R

3

R

2

R

1

R

0

D7–D0

P

Write All

VREG_*

S

0

0

0011111

D7–D0

P

Write

NVREG_

S

0

0

010

R

3

R

2

R

1

R

0

D7–D0

P

Write VREG_

and NVREG_

S

0

0

011

R

3

R

2

R

1

R

0

D7–D0

P

Transfer

NVREG_ to

VREG_

S

0

0

000

R

3

R

2

R

1

R

0

—P

Table 4. Write-Command Summary

*This option is only valid for a write to all volatile registers.