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CYUSB306X Datasheet(PDF) 1 Page - Cypress Semiconductor |
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CYUSB306X Datasheet(HTML) 1 Page - Cypress Semiconductor |
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1 / 37 page ![]() CYUSB306X EZ-USB® CX3: MIPI CSI-2 to SuperSpeed USB Bridge Controller Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-87516 Rev. *L Revised June 22, 2017 EZ-USB® CX3: MIPI CSI-2 to SuperSpeed USB Bridge Controller Features ■ Universal Serial Bus (USB) integration ❐ USB 3.0 and USB 2.0 peripherals, compliant with USB 3.0 specification 1.0 ❐ 5-Gbps USB 3.0 PHY compliant with PIPE 3.0 ❐ Thirty-two physical endpoints ■ MIPI CSI-2 RX interface ❐ MIPI CSI-2 compliant (Version 1.01, Revision 0.04 – 2nd April 2009) ❐ Supports up to four data lanes (CYUSB3065 supports up to four lanes; CYUSB3064 supports up to two lanes) ❐ Each lane supports up to 1 Gbps (CYUSB3065 supports up to four lanes; CYUSB3064 supports up to two lanes) ❐ CCI interface for image sensor configuration ■ Supports the following video data formats: ❐ User-defined 8-bit ❐ RAW8/10/12/14 ❐ YUV422 (CCIR/ITU 8/10bit), YUV444 ❐ RGB888/666/565 ■ Fully accessible 32-bit CPU ❐ ARM926EJ-S core with 200-MHz operation ❐ 512-KB or 256-KB embedded SRAM ■ Additional connectivity to the following peripherals: ❐ I2C master controller at 1 MHz ❐ I2S master (transmitter only) at sampling frequencies of 32 kHz, 44.1 kHz, and 48 kHz ❐ UART support of up to 4 Mbps ❐ SPI master at 33 MHz ■ Twelve GPIOs ■ Ultra-low-power in core power-down mode ■ Independent power domains for core and I/O ❐ Core operation at 1.2 V ❐ I2S, UART, and SPI operation at 1.8 to 3.3 V ❐ I2C, I/O operation at 1.8 to 3.3 V ■ 10 × 10 mm, 0.8-mm pitch Pb-free ball grid array (BGA) package ■ EZ-USB® software development kit (SDK) for easy code development Applications ■ Digital video cameras ■ Digital still cameras ■ Webcams ■ Scanners ■ Video conference systems ■ Gesture-based control ■ Surveillance cameras ■ Medical imaging devices ■ Video IP phones ■ USB microscopes ■ Industrial cameras |
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