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EM78P257 Datasheet(PDF) 10 Page - ELAN Microelectronics Corp |
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EM78P257 Datasheet(HTML) 10 Page - ELAN Microelectronics Corp |
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10 / 91 page ![]() EM78P257 OTP ROM This specification is subject to change without prior notice. 07.27.2004 (V1.4) 10 4. FUNCTION DESCRIPTION DATA & CONTROL BUS Oscillator Timing Control WDT timer Prescaler RAM R4 R1(TCC) Interrupt controller ROM Instruction Register R2 ALU ACC R3 Instruction decoder OSCI OSCO /RESET TCC /INT IOC5 R5 COUNTER STACK 6 IOC6/7 R6/7 PORT5 I/O P60/INT P61/CIN3-/TCC1 P62/CIN3+ P63/CO3 P64/CO4 P65/CIN4+ P66/CIN4-/TCC2 P67/IR OUT P70/OSCO P71//RESET TCC4/CIN1+/P50 TCC3/CO1/P51 CO2/P52 CIN2+/P53 TCC/CIN2-/P54 OSCI/CIN1-/P55 TCC5/P56 TCC6/P57 STACK 7 STACK 5 STACK 4 STACK 3 STACK 2 STACK 1 STACK 0 Built-in OSC I/O PORT6/7 Comparator Fig. 3 Functional block diagram 4.1 Operational Registers 1. R0 (Indirect Addressing Register) R0 is not a physically implemented register. Its major function is to be an indirect addressing pointer. Any instruction using R0 as a pointer actually accesses data pointed by the RAM Select Register (R4). 2. R1 (Time Clock /Counter)/TCC • Increased by an external signal edge which is defined by the TE bit (CONT-4) through the TCC pin, or by the instruction cycle clock. • Writable and readable as any other registers. • The prescaler (RC) is assigned to TCC. • The contents of the prescaler counter is cleared only when a value is written to TCC register. 3. R2 (Program Counter) & Stack/PC |
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