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LT8311

8311f

For more information www.linear.com/LT8311

PIN FUNCTIONS

CSW (Pin 1): Catch MOSFET Drain Sense Pin. Connect

this pin to the external N-channel catch MOSFET’s drain

through a 2k resistor (typical) in preactive mode. Mini-

mize parasitic capacitance on the pin. Connect to GND in

SYNC mode.

FSW (Pin 3): Forward MOSFET Drain Sense Pin. Con-

nect this pin to the external N-channel forward MOSFET’s

drain through 2k resistor (typical) in preactive mode.

Minimize parasitic capacitance on the pin. Connect to

GND in SYNC mode.

FG (Pin 5): Forward MOSFET Gate Driver Pin. This pin

drivesthegateoftheexternalN-channelforwardMOSFET.

Minimize trace length between this pin and the forward

MOSFET gate.

INTVCC (Pin 6): Internal Linear Regulator’s Output Pin.

INTVCC powers the gate drivers on the LT8311. The volt-

age on this pin is internally regulated to 7V. Alternatively,

the pin can be overdriven externally. A minimum of 4.7µF

(ceramic capacitor) must be placed from this pin to GND.

VIN (Pin 7): Input Supply Pin. This pin must be locally

bypassed.

PMODE (Pin 8): Preactive Mode Select Pin. Tying PMODE

to GND enables preactive mode. Tying PMODE to INTVCC

enables SYNC mode.

OPTO (Pin 9): Opto Driver Output Pin. Tie this pin, through

a series resistor, to the input of the opto-coupler. This

pin can source up to 10mA, sink 300μA typically, and is

short-circuit protected.

COMP (Pin 10): Error Amplifier Output Pin. Tie an ex-

ternal compensation network to this pin when using the

LT8311’s transconductance error amplifier as part of a

voltage feedback loop.

FB (Pin 11): Feedback Pin. This is the inverting input of

the LT8311’s internal error amplifier. The FB pin voltage

tracks the lower of the internal 1.227V reference and the

SS pin voltage. 75nA (bias current) typically flows out of

the pin. Tie this pin to a resistor divider network from the

output to set the desired output voltage.

TIMER (Pin 12): Switching Period Timeout Pin. A resistor

from this pin to ground sets an upper limit on the sum

of the forward and catch MOSFET on times (including

dead time between the two MOSFETs on period), every

cycle. If the sum of the on times of the catch and forward

MOSFET, per cycle (including the dead time), exceeds the

timeout period programmed by the TIMER resistor, then

all synchronous conduction will be shut down. Synchro-

nous conduction resumes when the timeout period is

reset again. See the Applications Information section for

more details on programming the TIMER resistor. Keep

the ground return trace of this pin short, and away from

paths with switching noise.

PGOOD (Pin 13): Output Power Good Pin. The open-drain

output will be pulled to ground when the FB pin voltage

stays within ±7% of the internal 1.227V reference for a

period of 175µs. The internal PGOOD comparator has a

hysteresisof±3%.Therefore,whenFBexistsoutside±10%

of the 1.227V reference, the PGOOD pin will be pulled high

by an external pull-up resistor or current source.

SS (Pin 14): Soft-Start Pin. A capacitor from the SS pin to

GND will be charged up by SS’s internally trimmed 10µA

current source. Since FB tracks the lower of the SS pin

voltage and the internal reference of 1.227V, the charge

rate of the SS pin can be used to set the slew rate at which

the FB pin charges up to its regulation voltage of 1.227V.

The SS pin typically charges up to 2V. When using the

LT8311 as part of voltage feedback loop, place a ceramic

capacitor of at least 1nF on this pin to GND. For details on

SS start-up and overshoot control functions, please refer

to the Applications Information section.

SYNC (Pin 15): Synchronization Pin. The SYNC pin, used

only in SYNC mode, serves as an edge-sensitive input to

receive timing information for synchronous switching. It

is typically driven with PWM synchronization signals from

the primary-side IC through a pulse transformer. A nega-

tive voltage slew on the SYNC pin (–1.2V threshold) turns

on the forward MOSFET and turns off the catch MOSFET.

Equivalently,apositivevoltageslew(1.2Vthreshold)turns

on the catch MOSFET and turns off the forward MOSFET.

Tie the SYNC pin to GND in preactive mode.

CG(Pin16):CatchMOSFETGateDriverPin.Thispindrives

thegateoftheexternalN-channelcatchMOSFET.Minimize

trace length between this pin and the catch MOSFET gate.

CSN, CSP (Pin 18, Pin 20): Current Sense Differential

Inputs. CSP and CSN are the positive and negative inputs,

respectively, of the LT8311’s internal current sense com-

parator. The pins are typically connected across the catch

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