LT3752 datasheet(36/48 Pages) LINER

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LT8311

8311f

For more information www.linear.com/LT8311

APPLICATIONS INFORMATION

placing 1%, 1.65k resistors in series with CSP and CSN

should allow the LT8311 to trip with approximately zero

volts across the catch MOSFET. Note that the current

comparator has a propagation delay of 100ns nominally,

so the time taken from the current comparator getting

tripped to the catch MOSFET turning off is about 100ns.

During this 100ns, the current in the output inductor can

reverse and flow from the drain-to-source of the catch

MOSFET. If negative current flow in MCGisnotdesired,the

CSP pin series resistor can be chosen to trip at a positive

value of source-to-drain catch MOSFET current. The fol-

lowing equation allows calculation of the resistor (RCSP)

to be placed in series with the CSP pin for a desired value

of catch MOSFET trip current (ITRIP):

RCSP =

66mV

− ITRIP • RSNS

40µA

where RSNS is the RDS(ON) of the catch MOSFET when the

CSP and CSN pins are connected directly across the drain-

source terminals of the catch MOSFET. Alternatively, RSNS

is the sense resistor in the source of the catch MOSFET

if the CSP/CSN pins are connected directly across the

sense resistor. Once the resistor in series with the CSP

pin (RCSP) is decided, place an identical resistor in series

with the CSN pin.

Configuring CSP/CSN Inputs of the Current Sense

Comparator in SYNC Mode

The LT8311 is typically operated in SYNC mode when the

forward converter needs to be operated in FCM (forced

continuous mode). In SYNC mode, the LT8311 receives

synchronous control signals on its SYNC pin, through a

pulse transformer, from the primary-side IC’s SOUT pin.

Connecting the LT8311’s CSP/CSN pins across the catch

MOSFET’s drain and source, in SYNC mode, is done to

protect the catch MOSFET from conducting too large a

reverse inductor current at light load.

The following guidelines offered (Steps 1 to 5) may be

used to determine an appropriate catch MOSFET reverse

current trip point (VTRIP):

Step 1: Determine the worst-case negative inductor

current value during regular FCM operation, which will

likelyhappenatthesmallestfrequencyfoldbackfrequency,

highest VIN, and at 0A load. An easy way to determine this

is to run the forward converter with the LT8311 working

in SYNC mode and keeping the CSP/CSN pins shorted

to GND. Observing the inductor current waveform on an

oscilloscope at start-up, with VIN at its maximum value,

and the load at 0A, can quickly give the user an idea of the

worst-case negative inductor current value (ICATCH_FET)

during regular start-up operation. This will set a lower

bound on the CSP/CSN trip point (VTRIP minimum):

VTRIP Minimum = |ICATCH_FET| • RDS(ON)

where RDS(ON) is the on-resistance of the catch MOSFET,

and ICATCH_FET is the worst-case magnitude of negative

inductor current (current flowing from drain to source of

catch MOSFET) during FCM operation at startup.

Step 2: Pick a trip point (VTRIP) that allows some margin

from the value calculated in Step 1. Typical margin might

be 20%, thereby setting a trip point of:

VTRIP = 1.2 • VTRIP Minimum

Step 3: Determine the selected catch MOSFET’s single

pulse avalanche energy rating (EAS in mJ) from the MOS-

FET’s data sheet and its drain-source break down voltage

(VBR(DSS) in V).

Step 4: Make sure that the chosen CSP/CSN trip voltage

does not allow so much negative current in the catch

MOSFET, such that when the catch MOSFET turns off, its

avalanche energy rating (based on the following equation)

is violated:

VTRIP (in Volts) < RDS(ON) •

2 •EAS •

(1.3 • VBR(DSS) − VOUT)

(1.3 • VBR(DSS) • LOUT)













where,

EAS (Joules) = Catch MOSFET’s single-pulse avalanche

energy rating.

VBR(DSS) (V) = Catch MOSFET’s drain-source break down

voltage rating.

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