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AM3351 Datasheet(PDF) 118 Page - Texas Instruments

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Part # AM3351
Description  Sitara Processors
PDF  252 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM3351 Datasheet(HTML) 118 Page - Texas Instruments

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MDIO_CLK (Output)
1
2
MDIO_DATA (Input)
118
AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351
SPRS717J – OCTOBER 2011 – REVISED APRIL 2016
www.ti.com
Submit Documentation Feedback
Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 AM3351
Peripheral Information and Timings
Copyright © 2011–2016, Texas Instruments Incorporated
7.6
Ethernet Media Access Controller (EMAC) and Switch
7.6.1
EMAC and Switch Electrical Data and Timing
The EMAC and Switch implemented in the AM335x device supports GMII mode, but the AM335x design
does not pin out 9 of the 24 GMII signals. This was done to reduce the total number of package terminals.
Therefore, the AM335x device does not support GMII mode. MII mode is supported with the remaining
GMII signals.
The AM335x and AMIC110 Sitara Processors Technical Reference Manual and this document may
reference internal signal names when discussing peripheral input and output signals because many of the
AM335x package terminals can be multiplexed to one of several peripheral signals. For example, the
AM335x terminal names for port 1 of the EMAC and switch have been changed from GMII to MII to
indicate their Mode 0 function, but the internal signal is named GMII. However, documents that describe
the Ethernet switch reference these signals by their internal signal name. For a cross-reference of internal
signal names to terminal names, see Table 4-2.
Operation of the EMAC and switch is not supported for OPP50.
Table 7-5. EMAC and Switch Timing Conditions
PARAMETER
MIN
TYP
MAX
UNIT
Input Conditions
tR
Input signal rise time
1(1)
5(1)
ns
tF
Input signal fall time
1(1)
5(1)
ns
Output Condition
CLOAD
Output load capacitance
3
30
pF
(1) Except when specified otherwise.
7.6.1.1
EMAC/Switch MDIO Electrical Data and Timing
Table 7-6. Timing Requirements for MDIO_DATA
(see Figure 7-3)
NO.
MIN
TYP
MAX
UNIT
1
tsu(MDIO-MDC)
Setup time, MDIO valid before MDC high
90
ns
2
th(MDIO-MDC)
Hold time, MDIO valid from MDC high
0
ns
Figure 7-3. MDIO_DATA Timing - Input Mode
Table 7-7. Switching Characteristics for MDIO_CLK
(see Figure 7-4)
NO.
PARAMETER
MIN
TYP
MAX
UNIT
1
tc(MDC)
Cycle time, MDC
400
ns
2
tw(MDCH)
Pulse duration, MDC high
160
ns
3
tw(MDCL)
Pulse duration, MDC low
160
ns
4
tt(MDC)
Transition time, MDC
5
ns



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