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MP2661 Datasheet(PDF) 19 Page - Monolithic Power Systems |
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MP2661 Datasheet(HTML) 19 Page - Monolithic Power Systems |
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19 / 35 page ![]() MP2661 – 0.5A, 1-CELL CHARGER W/ I2C CONTROL AND POWER PATH MP2661 Rev. 1.03 www.MonolithicPower.com 19 4/9/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018MPS. All Rights Reserved. The following actions restart the safety timer: A new charge cycle is kicked in Reg01 bit [3] is written from 0 to 1 (charge enable) Reg05 bit [3] is written from 0 to 1 (safety timer enable) Reg01 bit [7] is written from 0 to 1 (software reset) Host Mode and Default Mode The IC is a host-controlled device. After the power-on reset, the IC starts in the watchdog timer expiration state or default mode. All registers are in the default settings. Any write to the IC changes it to host mode. All charge parameters are programmable. If the watchdog timer (Reg05 bit [5:4]) is not disabled, the host must reset the watchdog timer regularly by writing 1 to the Reg01 bit [6] before the watchdog timer expires to keep the device in host mode. Once the watchdog timer expires, the IC returns to default mode. The watchdog timer limit can also be programmed or disabled by the host control. When there is no VIN, the watchdog timer is suspended. (Figure 9) The operation can also be changed to default mode when one of the following conditions occur: Refresh input without battery Re-insert battery with no VIN Register reset Reg01 bit [7] is reset Battery Discharge Function If battery is connected and the input source is missing, the battery MOSFET is fully on when VBATT is above the VUV_BATT threshold. The 100mΩ battery MOSFET minimizes conduction loss during discharge. The quiescent current of the IC is as low as 11μA in this mode. The low on resistance and low quiescent current help extend the running time of the battery. Over-Discharge Current Protection The IC has an over-discharge current protection in discharge mode and supplement mode. Once IBATT exceeds the programmable discharge current limit (default 1.785A), the battery MOSFET is turned off after a 60µs delay, and the MP2661enters hiccup mode in over- current protection. The discharge current can be programmed high to 3.2A through the I2C.Ifthe discharge current goes high to reach the internal fixed current limit (about 3.7A), the battery MOSFET is turned off and starts hiccup mode immediately. Similarly, when the battery voltage falls below the programmable VUV_BATT threshold (default 2.8V), the battery MOSFET is turned off to prevent over-discharge. System Short-Circuit Protection (SCP) The MP2661 features SYS node short-circuit protection (SCP) for the IN to SYS path and the BATT to SYS path. The system voltage is continuously monitored. If VSYS is lower than 1.5V, the system (SCP) for the IN to SYS path and the BATT to SYS path are active. IBATTOC is decreased to half of the original value. 1) IN to SYS path: Once IIN is over the protection threshold, both the LDO MOSFET and the BATT MOSFET are turned off immediately, and the IC enters hiccup mode. Otherwise, the max current limit and the setting input current limit are not reached, and IIN is regulated at IINLMT. Hiccup mode also starts after a 60µs delay. The interval of the hiccup mode is 800µs. 2) BATT to SYS path: Once IBATT is over the 3.7A protection threshold, both the LDO MOSFET and the BATT MOSFET are turned off immediately, and the IC enters hiccup mode. When the battery discharge current limit threshold is reached, hiccup mode starts after a 60µs delay. The interval of the hiccup mode is 800µs. If a system short-circuit occurs when both the input and battery are present, the protection mechanism of both paths work, with the faster one dominating the hiccup operation. (Figure 12) Interrupt to Host (INT) The IC has an alert mechanism which can output an interrupt signal via INT to notify the system of the operation by outputting a 256μs low-state INT pulse. All of the below events can trigger the INT output: |
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