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MP2661 Datasheet(PDF) 22 Page - Monolithic Power Systems |
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MP2661 Datasheet(HTML) 22 Page - Monolithic Power Systems |
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22 / 35 page ![]() MP2661 – 0.5A, 1-CELL CHARGER W/ I2C CONTROL AND POWER PATH MP2661 Rev. 1.03 www.MonolithicPower.com 22 4/9/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018MPS. All Rights Reserved. I2C REGISTER MAP IC Address: 09H (reserved some trim options) Input Source Control Register/Address: 00H (Default: 01001111) Bit Symbol Description Read/Write Default Bit 7 EN_HIZ (7) 0:disable 1:enable Read/write Disable (0) Input Voltage Regulation Bit 6 VIN REG [3] 640mV Read/write Offset: 3.88V Range:3.88V -5.08V Default: 4.60V (1001) Bit 5 VIN REG [2] 320mV Bit 4 VIN REG [1] 160mV Bit 3 VIN REG [0] 80mV Input Current Limit Bit 2 IIN_LIM [2] 000:85mA 001:130mA 010:175mA 011:220mA 100:265mA 101:310mA 110:355mA 111:455mA Read/write 455mA (111) Bit 1 IIN_LIM [1] Bit 0 IIN_LIM [0] NOTE: 7) This bit only controls the on and off of the LDO MOSFET. Power-On Configuration Register/Address: 01H (Default: 0000 0100) Bit Symbol Description Read/Write Default Bit 7 Register reset 0:keep current setting 1: reset Read/write Keep current setting (0) Bit 6 I 2C watchdog timer reset 0:normal 1:reset Read/write Normal(0) Bit 5 Reserved Read/write Reserved Bit 4 Reserved Read/write Reserved Charger Configuration Bit 3 CEB 0: charge enabled 1:charge disabled Read/write Charge enabled (0) Battery UVLO Threshold Bit 2 VUV BATT [2] 0.4V Read/write Offset: 2.4V Range: 2.4V-3.1V Default: 2.8V (100) Bit 1 VUV BATT [1] 0.2V Bit 0 VUV BATT [0] 0.1V |
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