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LMX2572LP Datasheet(PDF) 26 Page - Texas Instruments |
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LMX2572LP Datasheet(HTML) 26 Page - Texas Instruments |
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26 / 82 page ![]() 26 LMX2572LP SNAS764 – MAY 2018 www.ti.com Product Folder Links: LMX2572LP Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated 7.6.5 Register R4 (offset = 04h) [reset = 0A43h] Figure 32. Register R4 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 1 0 1 0 0 1 0 0 0 0 1 1 R/W-A43h Table 11. Register R4 Field Descriptions Bit Field Type Reset Description 15 - 0 R/W A43h Program A43h to this field. After programming R0 with RESET = 1, no need to program this register. 7.6.6 Register R5 (offset = 05h) [reset = 30C8h] Figure 33. Register R5 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 1 IPBUF_T YPE IPBUF_T ERM 0 0 0 1 1 0 0 1 0 0 0 R/W-1h R/W-1h R/W-0h R/W-C8h Table 12. Register R5 Field Descriptions Bit Field Type Reset Description 15 - 13 R/W 1h Program 1h to this field. 12 IPBUF_TYPE R/W 1h Selects OSCin input type. 0: Differential input 1: Single-ended input 11 IPBUF_TERM R/W 0h Enables internal 50-Ω terminations on both OSCin and OSCin* pins. This function is valid even if OSCin input is configured as single-ended input. 0: Normal operation 1: OSCin and OSCin* pins are internally 50-Ω terminated 10 - 0 R/W C8h Program C8h to this field. 7.6.7 Register R6 (offset = 06h) [reset = C802h] Figure 34. Register R6 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 LDO_DLY 0 0 0 0 0 0 0 0 0 1 0 R/W-19h R/W-2h Table 13. Register R6 Field Descriptions Bit Field Type Reset Description 15 - 11 LDO_DLY R/W 19h LDO start up delay. Delay duration is a function of state machine clock. See Power- Up, Wake-Up Time for details. 10 - 0 R/W 2h Program 2h to this field. 7.6.8 Register R7 (offset = 07h) [reset = 00B2h] Figure 35. Register R7 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 OUT_FO RCE 0 0 0 0 0 0 1 0 1 1 0 0 1 0 R/W-0h R/W-0h R/W-B2h |
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