LMX2572LP datasheet(46/82 Pages) TI1

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LMX2572LP

SNAS764 – MAY 2018

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7.6.80 Register R79 (offset = 4Fh) [reset = 0000h]

Figure 107. Register R79

RAMP_THRESH[31:16]

R/W-0h

Table 86. Register R79 Field Descriptions

Bit

Field

Type Reset

Description

15 - 0

RAMP_THRESH[31:16]

R/W

Upper 16 bits of RAMP_THRESH. See Table 85 for description.

7.6.81 Register R80 (offset = 50h) [reset = 0000h]

Figure 108. Register R80

RAMP_THRESH[15:0]

R/W-0h

Table 87. Register R80 Field Descriptions

Bit

Field

Type Reset

Description

15 - 0

RAMP_THRESH[15:0]

R/W

Lower 16 bits of RAMP_THRESH. See Table 85 for description.

7.6.82 Register R81 (offset = 51h) [reset = 0000h]

Figure 109. Register R81

RAMP_L

IMIT_HI

GH[32]

R/W-0h

Table 88. Register R81 Field Descriptions

Bit

Field

Type Reset

Description

15 - 1

R/W

Program 0h to this field.

RAMP_LIMIT_HIGH[32]

R/W

The 33rd bit of RAMP_LIMIT_HIGH.

RAMP_LIMIT_HIGH sets a maximum frequency that the ramp cannot exceed so that

the VCO does not get set beyond a valid frequency range.

Suppose fHIGH is this frequency and fVCO is the starting VCO frequency, then:

fHIGH ≥ fVCO;

RAMP_LIMIT_HIGH = 224 × (fHIGH – fVCO) / fPD

7.6.83 Register R82 (offset = 52h) [reset = 0000h]

Figure 110. Register R82

RAMP_LIMIT_HIGH[31:16]

R/W-0h

Table 89. Register R82 Field Descriptions

Bit

Field

Type Reset

Description

15 - 0

RAMP_LIMIT_HIGH

[31:16]

R/W

Upper 16 bits of RAMP_LIMIT_HIGH. See Table 88 for description.

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