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LMX2572LP Datasheet(PDF) 56 Page - Texas Instruments |
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LMX2572LP Datasheet(HTML) 56 Page - Texas Instruments |
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56 / 82 page ![]() 56 LMX2572LP SNAS764 – MAY 2018 www.ti.com Product Folder Links: LMX2572LP Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Table 121. Register R114 Field Descriptions (continued) Bit Field Type Reset Description 1 - 0 FSK_MODE_SEL R/W 0h Defines FSK mode. 0: Not used 1: FSK I2S 2: FSK SPI 3: FSK SPI FAST 7.6.116 Register R115 (offset = 73h) [reset = 0000h] Figure 143. Register R115 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 0 FSK_DEV_SCALE 0 0 0 R/W-0h R/W-0h R/W-0h Table 122. Register R115 Field Descriptions Bit Field Type Reset Description 15 - 8 R/W 0h Program 0h to this field. 7 - 3 FSK_DEV_SCALE R/W 0h The FSK deviation will be scaled by 2FSK_DEV_SCALE. 2 - 0 R/W 0h Program 0h to this field. 7.6.117 Register R116 (offset = 74h) [reset = 0000h] Figure 144. Register R116 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 FSK_DEV0 R/W-0h Table 123. Register R116 Field Descriptions Bit Field Type Reset Description 15 - 0 FSK_DEV0 R/W 0h Defines the desired frequency deviation in FSK SPI mode. 7.6.118 Register R117 (offset = 75h) [reset = 0000h] Figure 145. Register R117 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 FSK_DEV1 R/W-0h Table 124. Register R117 Field Descriptions Bit Field Type Reset Description 15 - 0 FSK_DEV1 R/W 0h Defines the desired frequency deviation in FSK SPI mode. 7.6.119 Register R118 (offset = 76h) [reset = 0000h] Figure 146. Register R118 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 FSK_DEV2 R/W-0h |
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