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LMX2572LP Datasheet(PDF) 40 Page - Texas Instruments |
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LMX2572LP Datasheet(HTML) 40 Page - Texas Instruments |
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40 / 82 page ![]() 40 LMX2572LP SNAS764 – MAY 2018 www.ti.com Product Folder Links: LMX2572LP Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated Table 64. Register R57 Field Descriptions Bit Field Type Reset Description 15 - 0 R/W 0h Program 20h to this field. 7.6.59 Register R58 (offset = 3Ah) [reset = 8001h] Figure 86. Register R58 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 INPIN_I GNORE INPIN_H YST INPIN_LVL INPIN_FMT 0 0 0 0 0 0 0 0 1 R/W-1h R/W-0h R/W-0h R/W-0h R/W-1h Table 65. Register R58 Field Descriptions Bit Field Type Reset Description 15 INPIN_IGNORE R/W 1h Ignore SYNC and SysRefReq pins when VCO_PHASE_SYNC = 0. This bit should be set to 1 unless VCO_PHASE_SYNC = 1. 14 INPIN_HYST R/W 0h Enables high hysteresis for LVDS input to SysRefReq and SYNC pin. 0: Disabled 1: Enabled 13 - 12 INPIN_LVL R/W 0h Sets bias level for LVDS input to SysRefReq and SYNC pin. 0: Vin / 4 1: Vin 2: Vin / 2 3: Invalid 11 - 9 INPIN_FMT R/W 0h Defines the input format of SysRefReq and SYNC pin. 0: SYNC = SysRefReq = CMOS 1: SYNC = LVDS; SysRefReq = CMOS 2: SYNC = CMOS; SysRefReq = LVDS 3: SYNC = SysRefReq = LVDS 4: SYNC = SysRefReq = CMOS 5: SYNC = LVDS (filtered); SysRefReq = CMOS 6: SYNC = CMOS; SysRefReq = LVDS (filtered) 7: SYNC = SysRefReq = LVDS (filtered) 8 - 0 R/W 1h Program 1h to this field. 7.6.60 Register R59 (offset = 3Bh) [reset = 0001h] Figure 87. Register R59 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LD_TYP E R/W-0h R/W-1h Table 66. Register R59 Field Descriptions Bit Field Type Reset Description 15 - 1 R/W 0h Program 0h to this field. 0 LD_TYPE R/W 1h Defines lock detect type. 0: VCOCal. Lock detect asserts a HIGH output after the VCO has finished calibration and the LD_DLY timeout counter is finished. 1: Vtune and VCOCal. Lock detect asserts a HIGH output when VCOCal lock detect would assert a HIGH signal and the tuning voltage to the VCO is within acceptable limits. |
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