ZL2004 datasheet(25/42 Pages) RENESAS

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ZL2004

FN6846 Rev. 3.00

Page 25 of 42

February 15, 2011

Once the sensing method has been selected, the user

must select the voltage threshold (VLIM), the desired

current limit threshold, and the resistance of the

sensing element.

The threshold voltage can be selected in 5 mV

increments by connecting a resistor, RILIM, between the

ILIM pin and ground according to Table 18. This

method is preferred if the user does not desire to use or

does not have access to the I

2C/SMBus interface and

the desired threshold value is contained in Table 18.

The current limit threshold can also be set to a custom

value via the I

2C/SMBus interface. Please refer to

Application Note AN33 for further details.

5.9 Loop Compensation

The ZL2004 operates as a voltage-mode synchronous

buck controller with a fixed frequency PWM scheme.

Although the ZL2004 uses a digital control loop, it

operates

much

traditional

analog

PWM

controller. Figure 15 is a simplified block diagram of

the ZL2004 control loop, which differs from an analog

control loop only by the constants in the PWM and

compensation blocks. As in the analog controller case,

the compensation block compares the output voltage to

the desired voltage reference and compensation zeroes

are added to keep the loop stable. The resulting

integrated error signal is used to drive the PWM logic,

converting the error signal to a duty cycle to drive the

external MOSFETs.

1-D

VIN

VOUT

DPWM

Compensation

Figure 15. Control Loop Block Diagram

In the ZL2004, the compensation zeros are set by

configuring the FC pin or via the I

2C/SMBus interface

once the user has calculated the required settings. This

method

eliminates

the

inaccuracies

due

the

component tolerances associated with using external

resistors and capacitors required with traditional analog

controllers. Utilizing the loop compensation settings

shown in Table 19 will yield a conservative crossover

frequency at a fixed fraction of the switching

frequency (fSW/20) and 60° of phase margin.

Step 1:

Using the following equation, calculate the

resonant frequency of the LC filter, fn.





Step 2:

Calculate the ESR zero frequency (fZESR).

πCRc

zesr



Step 3:

Based on Table 19, determine the FC setting.

5.10 Adaptive Loop Compensation

Loop compensation can be a time-consuming process,

forcing the designer to accommodate design trade-offs

related to performance and stability across a wide

range of operating conditions. The ZL2004 offers an

adaptive compensation mode that enables the user to

increase the stability over a wider range of loading

conditions

automatically

adapting

the

loop

compensation coefficients for changes in load current.

Setting the loop compensation coefficients through the

2C/SMBus interface allows for a second set of

coefficients to be stored in the device in order to utilize

adaptive loop compensation. This algorithm uses the

two sets of compensation coefficients to determine

optimal compensation settings as the output load

changes. Please refer to Application Note AN33 for

further details.

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