LPC47M192 datasheet(225/228 Pages) SMSC

225 / 228 page

SMSC DS – LPC47M192

Page 225

Rev. 03/30/05

DATASHEET

TRUTH TABLE 2 - Toggling Inputs in Ascending Order

PIN 1

PIN 2

PIN 3

PIN 4

PIN 5

PIN ...

PIN 100

OUTPUT

PIN 85

INITIAL CONFIG

STEP 1

STEP 2

STEP 3

STEP 4

STEP 5

…

STEP N

END CONFIG

16.2 Hardware Monitoring Block

16.2.1 BOARD TEST MODE

Board test mode for the Hardware Monitor Block is implemented as an XNOR-chain as described in the subsection

below. The XNOR chain for the Hardware Monitor Block is self-contained within the Hardware Monitor Block. The

XNOR chain for the rest of the chip is separate from the XNOR chain for the Hardware Monitor Block.

Board test mode for the Hardware Monitoring Block can be entered by programming a ‘1’ to the XNOR_IN pin at

power-up. To exit the test mode, the XNOR_IN pin should be tied to ‘0’ on the subsequent power up.

16.2.2 XNOR-CHAIN TEST MODE

The tests that are performed when the XNOR-Chain test structure is activated require the board-level test hardware

to control the device pins and observe the results at the XNOR-Chain output pin. The XNOR-Chain output is on

A0/RESET#/THERM#/XNOR_OUT pin. VCC, GND and all the analog pins are not used as inputs for XNOR-Chain

Test.

Testing

Program a ‘1’ on XNOR_IN pin. Turn power on. The Hardware Monitor Block is now in XNOR chain test mode.

At this point, all inputs to the XNOR chain are low. The output on A0/RESET#/THERM#/XNOR_OUT will also be

high. Refer to INITIAL CONFIG on TRUTH TABLE 3.

Bring VID4 pin high. The output on A0/RESET#/THERM#/XNOR_OUT will go low. Refer to STEP ONE on

TRUTH TABLE 3.

In descending pin order, bring each input high. The output will switch states each time an input is toggled.

Continue until all inputs are high. The output on A0/RESET#/THERM#/XNOR_OUT will now be low. Refer to

END CONFIG on TRUTH TABLE 3.

The current state of the Hardware Monitor Block is now represented by INITIAL CONFIG in TRUTH TABLE 4.

Each input should now be brought low, starting at pin one and continuing in ascending order. Continue until all

inputs are low. The output on A0/RESET#/THERM#/XNOR_OUT will now be high. Refer to TRUTH TABLE 4.

To exit test mode, tie the XNOR_IN pin low, and power down the Hardware Monitor Block. The Hardware

Monitor Block will not be in test mode on the subsequent power-up.

LPC47M192 Datasheet(PDF) 225 Page - SMSC Corporation

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