SC16C652B datasheet(6/44 Pages) PHILIPS

6 / 44 page

Philips Semiconductors

SC16C652B

Dual UART with 32-byte FIFOs and IrDA encoder/decoder

Product data

Rev. 03 — 10 December 2004

6 of 44

9397 750 14452

TXRDYA,

TXRDYB

43, 6

Transmit Ready A, B (Active-LOW). These outputs provide the TX FIFO/THR

status for individual transmit channels (A-B). TXRDYn is primarily intended for

monitoring DMA mode 1 transfers for the transmit data FIFOs. An individual

channel’s TXRDYA, TXRDYB buffer ready status is indicated by logic 0, i.e., at

lease one location is empty and available in the FIFO or THR. This pin goes to a

logic 1 (DMA mode 1) when there are no more empty locations in the FIFO or

THR. This signal can also be used for single mode transfers (DMA mode 0).

VCC

Power supply input.

XTAL1

Crystal or external clock input. Functions as a crystal input or as an external

clock input. A crystal can be connected between this pin and XTAL2 to form an

internal oscillator circuit. This conﬁguration requires an external 1 M

Ω resistor

between the XTAL1 and XTAL2 pins. Alternatively, an external clock can be

connected to this pin to provide custom data rates. (See Section 6.8

“Programmable baud rate generator”.) See Figure 4.

XTAL2

Output of the crystal oscillator or buffered clock. (See also XTAL1.) Crystal

oscillator output or buffered clock output. Should be left open if an external clock is

connected to XTAL1. For extended frequency operation, this pin should be tied to

VCC via a 2 kΩ resistor.

CDA,

CDB

40, 16

Carrier Detect (Active-LOW). These inputs are associated with individual UART

channels A through B. A logic 0 on this pin indicates that a carrier has been

detected by the modem for that channel.

CTSA,

CTSB

38, 23

25, 16

Clear to Send (Active-LOW). These inputs are associated with individual UART

channels, A through B. A logic 0 on the CTS pin indicates the modem or data set

is ready to accept transmit data from the SC16C652B. Status can be tested by

reading MSR[4]. This pin has no effect on the UART’s transmit or receive

operation.

DSRA,

DSRB

39, 20

Data Set Ready (Active-LOW). These inputs are associated with individual UART

channels, A through B. A logic 0 on this pin indicates the modem or data set is

powered-on and is ready for data exchange with the UART. This pin has no effect

on the UART’s transmit or receive operation.

DTRA,

DTRB

34, 35

Data Terminal Ready (Active-LOW). These outputs are associated with

individual UART channels, A through B. A logic 0 on this pin indicates that the

SC16C652B is powered-on and ready. This pin can be controlled via the modem

control register. Writing a logic 1 to MCR[0] will set the DTR output to logic 0,

enabling the modem. This pin will be a logic 1 after writing a logic 0 to MCR[0], or

after a reset. This pin has no effect on the UART’s transmit or receive operation.

RIA, RIB

41, 21

Ring Indicator (Active-LOW). These inputs are associated with individual UART

channels, A through B. A logic 0 on this pin indicates the modem has received a

ringing signal from the telephone line. A logic 1 transition on this input pin will

generate an interrupt.

Table 2:

Pin description…continued

Symbol

Type Description

LQFP48 HVQFN32

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