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ADV7311 Datasheet(PDF) 67 Page - Analog Devices |
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ADV7311 Datasheet(HTML) 67 Page - Analog Devices |
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67 / 84 page ![]() REV. A ADV7310/ADV7311 –67– Mode 0 (CCIR-656)—Master Option (Timing Register 0 TR0 = X X X X X 0 0 1) The ADV7310/ADV7311 generates H, V, and F signals required for the SAV (start active video) and EAV (end active video) time codes in the CCIR656 standard. The H bit is output on the S_HSYNC, the V bit is output on S_BLANK, and the F bit is output on S_VSYNC. 522 523 524 525 1 2 3 4 5 67 8 9 10 11 20 21 22 DISPLAY DISPLAY VERTICAL BLANK ODD FIELD EVEN FIELD H V F 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 283 284 285 ODD FIELD EVEN FIELD DISPLAY DISPLAY VERTICAL BLANK H V F Figure 79. SD Master Mode 0, NTSC 622 623 624 625 1 2 3 4 5 67 21 22 23 DISPLAY DISPLAY VERTICAL BLANK H V F ODD FIELD EVEN FIELD 309 310 311 312 314 315 316 317 318 319 320 334 335 336 DISPLAY DISPLAY VERTICAL BLANK H V F ODD FIELD EVEN FIELD 313 Figure 80. SD Master Mode 0, PAL |
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