ADV7311 datasheet(71/84 Pages) AD

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REV. A

ADV7310/ADV7311

–71–

Mode 2—Master Option

(Timing Register 0 TR0 = X X X X X 1 0 1)

In this mode, the ADV7310/ADV7311 can generate horizontal

and vertical sync signals. A coincident low transition of both

HSYNC and VSYNC inputs indicates the start of an odd field.

VSYNC low transition when HSYNC is high indicates the

start of an even field. The

BLANK signal is optional. When the

BLANK input is disabled, the ADV7310/ADV7311 automati-

cally blank all normally blank lines as per CCIR-624.

HSYNC

is output on

S_HSYNC , BLANK on S_BLANK, and VSYNC

S_VSYNC.

PAL = 12

CLOCK/2

NTSC = 16

CLOCK/2

PAL = 132

CLOCK/2

NTSC = 122

CLOCK/2

HSYNC

VSYNC

BLANK

PIXEL

DATA

Figure 87. SD Timing Mode 2 Even to Odd Field Transition Master/Slave

PAL = 864

CLOCK/2

NTSC = 858

CLOCK/2

PAL = 132

CLOCK/2

NTSC = 122

CLOCK/2

HSYNC

VSYNC

BLANK

PIXEL

DATA

PAL = 12

CLOCK/2

NTSC = 16

CLOCK/2

Figure 88. SD Timing Mode 2 Odd to Even Field Transition Master/Slave

ADV7311 Datasheet(PDF) 71 Page - Analog Devices

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