FM8PC71AM datasheet(37/73 Pages) FEELING

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FM8PC71AM

This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice.

No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product.

P.37

R1.1.004, Aug 7, 2017

FM8PC71AM

遠翔科技

Feeling Technology

6.1 PWM0 Register

Address 14H: PWM0 configuration Register(PWM0CON)

Bits

Name

P0INTSL

P0DT[2:0]

P0CKS[2:0]

Read/Write

R/W

Default

Bit[7] : P0INTSL

PWM0 interrupt selection.

1 = Select interrupt for PWM0 overflow.

0 = Select interrupt for PWM0 timer time out.

Bit[6:4] :P0DT[2:0]

PWM0 Duty Range.

P0DT [2:0],

PWM0 Duty Range

PWM0 Timer bits

High pulse

Low Pulse

3’b000

1~15

15~1

4 bits

3’b001

1~31

31~1

5 bits

3’b010

1~63

63~1

6 bits

3’b011

1~255

255~1

8 bits

3’b100

1~511

511~1

9 bits

3’b101

1~1023

1023~1

10 bits

3’b110

1~2047

2047~1

11 bits

3’b111

1~4095

4095~1

12 bits

TABLE 6-3 PWM0 Duty Range

Bit[3:1] : P0CKS

PWM0 Timer clock select.

P0CKS[2:0]

Clock select (Fp0ck)

3’b000

FCPU/(N0+1)

3’b001

FIRC (16Mhz)/(N0+1)

3’b010

FOSC/(N0+1)

3’b011

T0CK/(N0+1)

3’b100

T1CK/(N0+1)

3’b101

PA[3] drive Low

PA[4] drive Low

3’b110

PA[3] duty drive High base on Fp0ck = FIRC/N0

PA[4] duty drive Low base on Fp0ck = FIRC/N0

3’b111

PA[3] drive High

PA[4] drive High

Note : N0 Rang 0~255

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