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FM8PC71AM Datasheet(PDF) 12 Page - Feeling Technology Corp. |
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FM8PC71AM Datasheet(HTML) 12 Page - Feeling Technology Corp. |
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12 / 73 page  FM8PC71AM This datasheet contains new product information. Feeling Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of the product. P.12 R1.1.004, Aug 7, 2017 FM8PC71AM 遠翔科技 Feeling Technology Address Description(F-plane) Address R-Plane RAM-Bank=0 RAM-Bank=1 22h P2TRHB 23h PWM3CON 24h PWM3CR 25h P3TMLB(read)/N3(write) 25h N3(read) 26h P3RDLB 27h P3TRHB 28h ADCON1 28h ADCON3 29h ADCON2 30h ADCHB(read)/DACR1LB(write) 31h ADCLB(read)/DACR1HB(write) 32~34h General Purpose Registers 3 bytes 35h EFR1 36h EFR2 37h CMPCON1 38h CMPCON2 39h DACR2LB 3Ah DACR2HB 3B~3Fh (Revered) 40h | 7Fh 64 bytes 64 bytes *Accessed by IOST/IOSTR instruction *The R-plane Registers are loaded with the contents of the ACC register by executing the IOST instruction. By executing the IOSTR instruction, user read these registers 1.8 Register bit Mapping TABLE 1.8-1: F-plane Operational Registers Map Address Name B7 B6 B5 B4 B3 B2 B1 B0 00h (R/W) INDF Uses contents of FSR to address data memory (not a physical register) 01h (R/W) Revered -- 02h (R/W) PCL Low order 8 bits of PC 03h (R/W) STATUS -- -- -- /TO /PD Z DC C 04h (R/W) FSR Indirect data memory address pointer 05h (r/w) PORTA PA[7:0] 06h (r/w) PORTB -- -- PB[5:0] 07h (r/w) PAIE PAIE7 PAIE6 PAIE5 PAIE4 PAIE3 PAIE2 PAIE1 PAIE0 08h (r/w) PBIE -- -- PBIE5 PBIE4 PBIE3 PBIE2 PBIE1 PBIE0 09h (r/w) PACON PACON7 PACON6 PACON5 PACON4 PACON3 PACON2 PACON1 PACON0 0Ah (r/w) PBCON -- -- PBCON5 PBCON4 PBCON3 PBCON2 PBCON1 PBCON0 0BH(R/W) INTEN GIE -- -- -- -- -- -- TM0IE 0Ch (R/W) INTFLAG PBIF PAIF -- -- -- -- -- TM0IF 0Dh(R/W) -- -- -- -- -- -- -- 0Eh(R/W) TM0 8-bit real time clock/counter 0Fh(R/W) TM0CON TM0EN -- TM0PS[2:0] TM0CKS[1:0] -- 10h(R/W) T0RLD T0RLD7 T0RLD6 T0RLD5 T0RLD4 T0RLD3 T0RLD2 T0RLD1 T0RLD0 11h(R/W) WDT WDTE WDTSL WDTPS2 WDTPS1 WDTPS0 LVRSL -- -- |
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