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GS3241 Datasheet(PDF) 39 Page - Semtech Corporation |
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GS3241 Datasheet(HTML) 39 Page - Semtech Corporation |
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39 / 108 page ![]() GS3241 Final Data Sheet Rev.2 PDS-061444 September 2017 39 of 108 Semtech Proprietary & Confidential www.semtech.com 4.7 Output Drivers The GS3241 features two independently-configurable output drivers (see Figure 3-3), with data (re-timed or bypassed) available on both outputs. The two drivers provide highly-configurable amplitude and pre-emphasis control. The signal on the outputs can be inverted to help with signal polarity when layout requires trace inversion. The PRBS generator is available on both outputs. The LOS (Loss Of Signal) status from the equalizer stage can be used to automatically mute or disable the outputs on their assertion. The Loss of Lock status from the CDR block can be used to mute the outputs. The trace drivers can be configured to mute or disable during sleep. The sleep control modes takes precedence over the manual or automatic LOS and Loss of Lock output control modes. Note: The <n> in the control parameter names refers to the output number. Output 0 is the trace driver output DDO0 and output 1 is the trace driver output DDO1. 4.7.1 Bypassed Re-timer Signal Output Control With the default power-up settings, the GS3241 outputs will automatically switch to the bypassed signal (non-re-timed) whenever the PLL is unlocked. Alternatively, manual re-timer bypass may be configured by setting the CTRL_OUTPUT<n>_RETIMER_ AUTO_BYPASS and CTRL_OUTPUT<n>_RETIMER_MANUAL_BYPASS parameters in register 0x4C to 0b and 1b respectively via the host interface, in which case the PLL will remain bypassed for all rates. The re-timer bypass function, manual or automatic, does not affect the input equalization function of the device. If both outputs are manually disabled, then the device will power down the CDR block and features of the re-timer such as rate detect and lock detect will no longer be accessible in this mode. 4.7.2 Output Driver Polarity Inversion While in data mode, the signal polarity may be inverted at the outputs through the CTRL_OUTPUT<n>_ DATA_ INVERT parameters in register 0x48. This may be useful to compensate for an inverted upstream signal or to facilitate board signal routing. To invert the polarity of either of the two output drivers, write 1b to control parameter CTRL_OUTPUT<n>_DATA_ INVERT. 4.7.3 Output Driver Data Rate Selection By default, the GS3241 uses the SD trace driver output group settings for all data rates, regardless of CDR lock condition or data rate being applied. The following parameters are used to control the output for all data rates in the default condition: CFG_OUTPUT<n>_TD_SD_DRIVER_SWING CFG_OUTPUT<n>_TD_SD_PREEMPH_WIDTH CFG_OUTPUT<n>_TD_SD_PREEMPH_AMPL CFG_OUTPUT<n>_TD_SD_PREEMPH_PWRDWN |
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