GS3241 datasheet(57/108 Pages) SEMTECH

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GS3241

Final Data Sheet

Rev.2

PDS-061444

September 2017

57 of 108

Semtech

Proprietary & Confidential

www.semtech.com

4.9.7 Single Read/Write Access

Single read/write access timing for the GSPI interface is shown in Figure 4-26 to



Figure 4-30.

When performing a single read or write access, one Data Word is read from/written to

the device per access. Each access is a minimum of 48-bits long, consisting of two

Command Words and a single Data Word. The read or write cycle begins with a

HIGH-to-LOW transition of the CS pin. The read or write access is terminated by a

LOW-to-HIGH transition of the CS pin.

Table 4-11: GSPI Timing Parameters

Parameter

Symbol

Equivalent

SCLK

Cycles

Min

Typ

Max

Units

SCLK Frequency

—

MHz

CS LOW Before SCLK Rising Edge

—1.7

—

SCLK Period

—37

—

SCLK Duty Cycle

—40

Input Data Setup Time

—2.3

—

SCLK Idle Time – Write

1/SCLK

—

SCLK Idle Time – Read

—

138

—

Inter–Command Delay Time

tcmd

115

—

Inter–Command Delay Time (after

GSPI configuration write)

tcmd_GSPI_conf

139

—

SDOUT After SCLK Falling Edge

—

1.3

—

6.4

CS HIGH After Final SCLK Falling

Edge

—0

—

Input Data Hold Time

—1.2

—

CS HIGH Time

—58

—

SDIN to SDOUT Combinatorial

Delay

——

—

3.4

Max chips daisy-chained at max

SCLK frequency (26 MHz)

When host clocks in SDOUT

data on falling edge of SCLK

——

# of

compatible

Semtech

devices

Max frequency for 32



daisy-chained devices

When host clocks in SDOUT

data on falling edge of SCLK

——

7.5

MHz

Note:

1. tcmd_GSPI_conf inter-command delay must be used whenever modifying CONTROL_REG register at address 0x00.

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