Ver 1.5

17/03/29

7

ES166

LCR/DMM analog front

After write operation is enable, the internal ADC timing will be reset. The first allowed

ADC data will be ready when the DATA_NEW is high. The read command includes

one ID byte with 20 data bytes. When DATA_NEW is ready, MCU could send the read

data command to get the result of ADC conversion (D0/D1/D2

flag from ES166.

The next table shows the content of read command.

Byte

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

ID

1

1

0

0

1

0

BUZ

R/W=1

R1

ALARM

DRDY

SIGN

LBAT

STA0

STA1

F_FIN

LDUTY

R2

HF

LF

OLD

D0:12

D0:11

D0:10

D0:09

D0:08

R3

D0:07

D0:06

D0:05

D0:04

D0:03

D0:02

D0:01

D0:00

R4

D1:19

D1:18

D1:17

D1:16

D1:15

D1:14

D1:13

D1:12

R5

D1:11

D1:10

D1:09

D1:08

D1:07

D1:06

D1:05

D1:04

R6

D1:03

D1:02

D1:01

D1:00

D2:19

D2:18

D2:17

D2:16

R7

D2:15

D2:14

D2:13

D2:12

D2:11

D2:10

D2:09

D2:08

R8

D2:07

D2:06

D2:05

D2:04

D2:03

D2:02

D2:01

D2:00

R9

R10

R11

R12

R13

R14

R15

R16

R17

R18

R19

R20

DATA_NEW for frequency or capacitance mode will be active when D0 or D3 data ready.

accessed from ES166 sequentially during read mode. The L/C impedance could be derived from the three

numbers and calculated by external MCU easily.