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68HC705JB3 Datasheet(PDF) 127 Page - Freescale Semiconductor, Inc

Part # 68HC705JB3
Description  8-bit microcontroller units (MCUs)
PDF  134 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

68HC705JB3 Datasheet(HTML) 127 Page - Freescale Semiconductor, Inc

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November 5, 1998
GENERAL RELEASE SPECIFICATION
MC68HC05JB3
MOTOROLA
REV 1
A-1
APPENDIX A
MC68HC705JB3
This
appendix
describes
the
MC68HC705JB3,
the
emulation
part
for
MC68HC05JB3. The
entire
MC68HC05JB3
data
sheet
applies
to
the
MC68HC705JB3, with exceptions outlined in this appendix.
A.1
INTRODUCTION
The MC68HC705JB3 is an EPROM version of the MC68HC05JB3, and is avail-
able for user system evaluation and debugging. The MC68HC705JB3 is function-
ally identical to the MC68HC05JB3 with the exception of the 2560 bytes user
ROM is replaced by 2560 bytes user EPROM. Also, the mask options available on
the MC68HC05JB3 are implemented using the Mask Option Register (MOR) in
the MC68HC705JB3.
The MC68HC705JB3 is not available in the 20-pin SOIC package.
A.2
MEMORY
The MC68HC705JB3 memory map is shown in Figure A-1.
A.3
MASK OPTION REGISTER (MOR)
The Mask Option Register (MOR) is a byte of EPROM used to select the features
controlled by mask options on the MC68HC05JB3. In order to program this regis-
ter the MORON bit in PCR need to be set to “1” before doing the EPROM pro-
gramming process.
COPEN – COP Enable
1 =
COP watchdog function disabled.
0 =
COP watchdog function enabled.
IRQTRIG – IRQ, PA0-PA3 Interrupt Option
1 =
Edge-triggered only.
0 =
Edge-and-level-triggered.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MOR
R
COPEN
IRQTRIG PULLREN PAINTEN
OSCDLY
LVREN
$01FF
W
reset:
00111111
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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