845GL datasheet(102/193 Pages) INTEL

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Intel® 82845G/82845GL/82845GV GMCH Datasheet

3.5.4

Device 6 Registers

Device 6 registers are Intel Reserved, except for the following two registers.

3.5.4.1

DWTC—DRAM Write Throttling Control Register (Device 6)

Address Offset

D0–D7h

Default Value

0000000000000000h

Access

R/W, L

Size:

64 bits

Bits

Description

63:41

Intel Reserved.

40:28

Global Write Hexword Threshold (GWHT).

The thirteen-bit value held in this field is multiplied by

215 to arrive at the number of hexwords that must be written within the Global DRAM Write Sampling

Window to cause the throttling mechanism to be invoked.

27:22

Write Throttle Time (WTT).

This value provides a multiplier between 0 and 63 which specifies how

long throttling remains in effect as a number of Global DRAM Write Sampling Windows. For

example, if GDWSW is programmed to 1000_0000b and WTT is set to 01_0000b, then throttling will

be performed for 8192*105 host clocks (at 100 MHz) seconds once invoked

(128 * 4*105 host clocks * 16).

21:15

Write Throttle Monitoring Window (WTMW).

The value in this register is padded with 4 0’s to

specify a window of 0-2047 host clocks with 16 clock Granularity. While the throttling mechanism is

invoked, DRAM writes are monitored during this window. If the number of hexwords written during

the window reaches the Write Throttle Hexword Maximum, then write requests are blocked for the

remainder of the window.

14:3

Write Throttle Hexword Maximum (WTHM).

The Write Throttle Hexword Maximum defines the

maximum number of hexwords between 0-4095 which are permitted to be written to DRAM within

one Write Throttle Monitoring Window.

2:1

Write Throttle Mode ((WTMode).

00 = Throttling via Counters and Hardware throttle_on signal mechanisms disabled.

01 = Reserved

10 = Counter mechanism controlled through GDWSW and GWHT is enabled. When the threshold

set in GDWSW and GWHT is reached, throttling start/stop cycles occur based on the settings

in WTT, WTMWand WTHM.

11 = Reserved

START Write Throttle (SWT).

Software writes to this bit to start and stop write throttling.

0 = Write throttling stops and the counters associated with WTMW and WTHM are reset.

1 = Write throttling begins based on the settings in WTMW and WTHM, and remains in effect until

this bit is reset to 0.

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