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82845MP Datasheet(PDF) 29 Page - Intel Corporation

Part # 82845MP
Description  Intel 845 Family Chipset-Mobile 82845MP/82845MZ Chipset Memory Controller Hub Mobile (MCH-M)
PDF  157 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82845MP Datasheet(HTML) 29 Page - Intel Corporation

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Intel
® 82845MP/82845MZ Chipset-Mobile (MCH-M)
250687-002
Datasheet
29
R
Signal Name
Type
Description
G_PAR
I/O
AGP
Parity
During FRAME# Operation: G_PAR is driven by the MCH-M when it acts as a
FRAME#-based AGP initiator during address and data phases for a write cycle,
and during the address phase for a read cycle. G_PAR is driven by the MCH-M
when it acts as a FRAME#-based AGP target during each data phase of a
FRAME#-based AGP memory read cycle. Even parity is generated across
G_AD[31:0] and G_CBE[3:0]#.
During SBA and PIPE# Operation: This signal is not used during SBA and PIPE#
operation.
NOTE:
PCIRST# from the ICH3-M is connected to RSTIN# and is used to reset AGP interface logic within the
MCH-M. The AGP agent will also use PCIRST# provided by the ICH3-M as an input to reset its internal
logic.



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