AM386SX datasheet(3/30 Pages) AMD

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FINAL

Am386SX/SXL/SXLV Microprocessors Data Sheet

BLOCK DIAGRAM

FUNCTIONAL DESCRIPTION

True Static Operation

(Am386SXL/SXLV Only)

The Am386SXL/SXLV microprocessor incorporates a

true static design. Unlike dynamic circuit design, the

Am386SXL/SXLV device eliminates the minimum op-

erating frequency restriction. It may be clocked from its

maximum speed all the way down to 0 MHz (DC). Sys-

tem designers can use this feature to design portable

applications with long battery life.

Standby Mode (Am386SXL/SXLV Only)

The true static design of the Am386SXL/SXLV micro-

processor allows for a Standby Mode. At any operating

speed, the microprocessor will retain its state (i.e., the

contents of all its registers). By shutting off the clock

completely, the device enters Standby Mode. Since

power consumption is proportional to clock frequency,

operating power consumption is reduced as the fre-

quency is lowered. In Standby Mode, typical current

draw is reduced to less than 20 microamps at DC. Not

only does this feature save battery life, but it also sim-

plifies the design of power-conscious portable applica-

tions in the following ways.

s Eliminates the need for software in BIOS to save

and restore the contents of registers.

s Allows simpler circuitry to control stopping of the

clock since the system does not need to know

the state of the processor.

Lower Operating Icc

(Am386SXL/SXLV Only)

True static design also allows lower operating Icc when

operating at any speed.

Performance on Demand

(Am386SXL/SXLV Only)

The Am386SXL/SXLV microprocessor retains its state

at any speed from 0 MHz (DC) to its maximum operat-

ing speed. With this feature, system designers may

vary the operating speed of the system to extend the

battery life in portable systems.

Pipeline/

Bus Size

Control

Effective Address Bus

Dedicated ALU Bus

Barrel

Shifter,

Adder

Multiply/

Divide

File

Decode

and

Sequencing

Control

ROM

Instruction

Decoder

3-Decoded

Instruction

Queue

Prefetcher/

Limit

Checker

Limit and

Attribute

PLA

Descriptor

Registers

3-Input

Adder

Page

Cache

Adder

Request

Prioritizer

Address

Driver

Protection

Test Unit

ALU

Control

ALU

Control

Instruction

Code

Stream

Segmentation Unit

Paging Unit

Bus Control

HOLD, INTR,

NMI, ERROR,

BUSY, RESET,

HLDA, FLT,

SMI*, IIBEN*

BHE, BLE,

A23-A1

M/IO, D/C,

W/R, LOCK,

ADS, NA,

READY,

SMIADS*,

SMIRDY*

D15-D0

* – On Am386SXLV only

32 Bit

Control

Attribute

PLA

and

Prefetch

Predecode

MUX/

Trans-

ceivers

Status

Flags

16-Byte

Code

Queue

Internal Control Bus

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