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SLRC400 Datasheet(PDF) 80 Page - NXP Semiconductors |
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SLRC400 Datasheet(HTML) 80 Page - NXP Semiconductors |
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80 / 101 page  SLRC400_33 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet PUBLIC Rev. 3.3 — 23 March 2010 054333 80 of 101 NXP Semiconductors SLRC400 ICODE reader IC 12.4 AC electrical characteristics 12.4.1 Separate read/write strobe bus timing Table 146. Antenna driver output pin characteristics Symbol Parameter Conditions Min Typ Max Unit VOH HIGH-level output voltage VDD(TVDD) = 5.0 V; IOL = 20 mA - 4.97 - V VDD(TVDD) = 5.0 V; IOL = 100 mA - 4.85 - V VOL LOW-level output voltage VDD(TVDD) = 5.0 V; IOL = 20 mA - 30 - mV VDD(TVDD) = 5.0 V; IOL = 100 mA - 150 - mV IO output current transmitter; continuous wave; peak-to-peak - - 200 mA Table 147. Separate read/write strobe timing specification Symbol Parameter Conditions Min Typ Max Unit tLHLL ALE HIGH time 20 - - ns tAVLL address valid to ALE LOW time 15 - - ns tLLAX address hold after ALE LOW time 8- - ns tLLRWL ALE LOW to read/write LOW time ALE LOW to NRD or NWR LOW 15 --ns tSLRWL chip select LOW to read/write LOW time NCS LOW to NRD or NWR LOW 0- - ns tRWHSH read/write HIGH to chip select HIGH time NRD or NWR HIGH to NCS HIGH 0- - ns tRLDV read LOW to data input valid time NRD LOW to data valid - - 65 ns tRHDZ read HIGH to data input high impedance time NRD HIGH to data high-impedance -- 20 ns tWLQV write LOW to data output valid time NWR LOW to data valid - - 35 ns tWHDX data output hold after write HIGH time data hold time after NWR HIGH 8- - ns tRWLRWH read/write LOW time NRD or NWR 65 - - ns tAVRWL address valid to read/write LOW time NRD or NWR LOW (set-up time) 30 --ns tWHAX address hold after write HIGH time NWR HIGH (hold time) 8 - - ns tRWHRWL read/write HIGH time 150 - - ns |
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