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M263 Datasheet(PDF) 308 Page - Nuvoton Technology Corporation

Part # M263
Description  Arm짰 Cortex짰-M 32-bit Microcontroller
PDF  398 Pages
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Manufacturer  NUVOTON [Nuvoton Technology Corporation]
Direct Link  http://www.nuvoton.com
Logo NUVOTON - Nuvoton Technology Corporation

M263 Datasheet(HTML) 308 Page - Nuvoton Technology Corporation

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M261/M262/M263
Mar 25, 2020
Page 308 of 398
Rev 1.02
6.11
Real Time Clock (RTC)
6.11.1
Overview
The Real Time Clock (RTC) controller provides the real time and calendar message. The RTC offers
programmable time tick and alarm match interrupts. The data format of time and calendar messages
are expressed in BCD format. A digital frequency compensation feature is available to compensate
external crystal oscillator frequency accuracy.
6.11.2
Features
Supports external power pin VBAT.
Supports real time counter in RTC_TIME (hour, minute, second) and calendar counter in
RTC_CAL (year, month, day) for RTC time and calendar check.
Supports alarm time (hour, minute, second) and calendar (year, month, day) settings in
RTC_TALM and RTC_CALM.
Supports alarm time (hour, minute, second) and calendar (year, month, day) mask enable
in RTC_TAMSK and RTC_CAMSK.
Selectable 12-hour or 24-hour time scale in RTC_CLKFMT register.
Optional support 1/128 second HZCNT in RTC_TIME and RTC_TALM.
Supports Leap Year indication in RTC_LEAPYEAR register.
Supports Day of the Week counter in RTC_WEEKDAY register.
Frequency of RTC clock source compensate by RTC_FREQADJ register.
All time and calendar message expressed in BCD format.
Supports periodic RTC Time Tick interrupt with 8 period interval options 1/128, 1/64,
1/32, 1/16, 1/8, 1/4, 1/2 and 1 second.
Supports RTC Time Tick and Alarm Match interrupt.
Supports chip wake-up from Idle or Power-down mode while a RTC interrupt signal is
generated.
Supports Daylight Saving Time software control in RTC_DSTCTL.
Supports up 3 pairs dynamic loop tamper pin or 6 individual tamper pin.
Built-in LXT frequency monitor .
Supports 80 bytes spare registers and tamper pins detection to clear the content of these
spare registers.
Supports Flash mass erase operate will also clear the 80 bytes spare registers content.



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