M263 datasheet(325/398 Pages) NUVOTON

325 / 398 page

M261/M262/M263

Mar 25, 2020

Page 325 of 398

Rev 1.02

6.25

USCI - I

2C Mode

6.25.1

Overview

On I

2C bus, data is transferred between a Master and a Slave. Data bits transfer on the SCL and SDA

lines are synchronously on a byte-by-byte basis. Each data byte is 8-bit. There is one SCL clock pulse

for each data bit with the MSB being transmitted first, and an acknowledge bit follows each transferred

byte. Each bit is sampled during the high period of SCL; therefore, the SDA line may be changed only

during the low period of SCL and must be held stable during the high period of SCL. A transition on

the SDA line while SCL is high is interpreted as a command (START or STOP). Please refer to Figure

6.25-1 for more detailed I

2C BUS Timing.

tBUF

STOP

SDA

SCL

START

tHD_STA

tLOW

tHD_DAT

tHIGH

tSU_DAT

Repeated

START

tSU_STA

tSU_STO

STOP

Figure 6.25-1 I

2C Bus Timing

The device’s on-chip I

2C provides the serial interface that meets the I2C bus standard mode

specification. The I

2C port handles byte transfers autonomously. The I2C mode is selected by

FUNMODE (UI2C_CTL [2:0]) = 100B. When enable this port, the USCI interfaces to the I

2C bus via

two pins: SDA and SCL. When I/O pins are used as I

2C ports, user must set the pins function to I2C in

advance.

Note: Pull-up resistor is needed for I

2C operation because the SDA and SCL are set to open-drain

pins when USCI is selected to I

2C operation mode .

6.25.2

Features



Full master and slave device capability



Supports of 7-bit addressing, as well as 10-bit addressing



Communication in standard mode (100 kBit/s) or in fast mode (up to 400 kBit/s)



Supports multi-master bus



Supports one transmit buffer and two receive buffer for data payload



Supports 10-bit bus time-out capability



Supports bus monitor mode.



Supports Power down wake-up by data toggle or address match



Supports setup/hold time programmable



Supports multiple address recognition (two slave address with mask option)

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