ATTINY412 datasheet(3/479 Pages) MICROCHIP

3 / 479 page

Table of Contents

Introduction......................................................................................................................1

Features.......................................................................................................................... 1

1. tinyAVR

® 1-Series Overview......................................................................................9

1.1.

Configuration Summary..............................................................................................................10

2. Ordering Information................................................................................................11

2.1.

ATtiny212....................................................................................................................................11

2.2.

ATtiny412....................................................................................................................................11

3. Block Diagram......................................................................................................... 12

4. Pinout...................................................................................................................... 13

4.1.

8-pin SOIC..................................................................................................................................13

5. I/O Multiplexing and Considerations........................................................................14

5.1.

Multiplexed Signals.................................................................................................................... 14

6. Memories.................................................................................................................15

6.1.

Overview.................................................................................................................................... 15

6.2.

Memory Map.............................................................................................................................. 16

6.3.

In-System Reprogrammable Flash Program Memory................................................................16

6.4.

SRAM Data Memory.................................................................................................................. 17

6.5.

EEPROM Data Memory............................................................................................................. 17

6.6.

User Row....................................................................................................................................17

6.7.

Signature Bytes.......................................................................................................................... 17

6.8.

I/O Memory.................................................................................................................................18

6.9.

FUSES - Configuration and User Fuses.................................................................................... 19

7. Peripherals and Architecture................................................................................... 30

7.1.

Peripheral Module Address Map................................................................................................ 30

7.2.

Interrupt Vector Mapping............................................................................................................ 31

7.3.

SYSCFG - System Configuration............................................................................................... 32

8. AVR CPU.................................................................................................................34

8.1.

Features..................................................................................................................................... 34

8.2.

Overview.................................................................................................................................... 34

8.3.

Architecture................................................................................................................................ 34

8.4.

ALU - Arithmetic Logic Unit........................................................................................................ 36

8.5.

Functional Description................................................................................................................37

8.6.

Register Summary - CPU...........................................................................................................42

8.7.

Register Description................................................................................................................... 42

9. NVMCTRL - Non Volatile Memory Controller.......................................................... 45

9.1.

Features..................................................................................................................................... 45

Datasheet Preliminary

DS40001911A-page 3

ATTINY412 Datasheet(PDF) 3 Page - Microchip Technology

ATTINY412 Datasheet(HTML) 3 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL