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ATTINY412 Datasheet(PDF) 30 Page - Microchip Technology |
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ATTINY412 Datasheet(HTML) 30 Page - Microchip Technology |
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30 / 479 page ![]() 7. Peripherals and Architecture 7.1 Peripheral Module Address Map The address map show the base address for each peripheral. For complete register description and summary for each peripheral module, refer to the respective module chapters. Table 7-1. Peripheral Module Address Map Base Address Name Description 0x0000 VPORTA Virtual Port A 0x001C GPIO General Purpose IO registers 0x0030 CPU CPU 0x0040 RSTCTRL Reset Controller 0x0050 SLPCTRL Sleep Controller 0x0060 CLKCTRL Clock Controller 0x0080 BOD Brown-Out Detector 0x00A0 VREF Voltage Reference 0x0100 WDT Watchdog Timer 0x0110 CPUINT Interrupt Controller 0x0120 CRCSCAN Cyclic Redundancy Check Memory Scan 0x0140 RTC Real Time Counter 0x0180 EVSYS Event System 0x01C0 CCL Configurable Custom Logic 0x0200 PORTMUX Port Multiplexer 0x0400 PORTA Port A Configuration 0x0600 ADC0 Analog to Digital Converter/Peripheral Touch Controller 0x06A0 DAC0 Digital to Analog Converter 0 0x0670 AC0 Analog Comparator 0x0680 DAC0 Digital to Analog Converter 0x0800 USART0 Universal Synchronous Asynchronous Receiver Transmitter 0x0810 TWI0 Two Wire Interface 0x0820 SPI0 Serial Peripheral Interface 0x0A00 TCA0 Timer/Counter Type A instance 0 0x0A40 TCB0 Timer/Counter Type B instance 0 0x0A80 TCD0 Timer/Counter Type D instance 0 ATtiny212/412 © 2017 Microchip Technology Inc. Datasheet Preliminary DS40001911A-page 30 |
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