LTC7803 datasheet(17/36 Pages) AD

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LTC7803

Rev 0

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Inductor Core Selection

Once the value for L is known, the type of inductor must

be selected. High efficiency converters generally cannot

afford the core loss found in low cost powdered iron cores,

forcing the use of more expensive ferrite or molypermal-

loy cores. Actual core loss is independent of core size

for a fixed inductor value, but it is very dependent on

inductance value selected. As inductance increases, core

losses go down. Unfortunately, increased inductance

requires more turns of wire and therefore copper losses

will increase.

Ferrite designs have very low core loss and are preferred

for high switching frequencies, so design goals can con-

centrate on copper loss and preventing saturation. Ferrite

core material saturates hard, which means that induc-

tance collapses abruptly when the peak design current is

exceeded. This results in an abrupt increase in inductor

ripple current and consequent output voltage ripple. Do

not allow the core to saturate!

Power MOSFET and Schottky Diode (Optional)

Selection

Two external power MOSFETs must be selected for the

LTC7803 controller: one N-channel MOSFET for the top

(main) switch, and one N-channel MOSFET for the bottom

(synchronous) switch.

The peak-to-peak drive levels are set by the INTVCC

voltage. This voltage is typically 5.15V during start-up

(see EXTVCC Pin Connection). Consequently, logic-level

threshold MOSFETs must be used in most applications.

Pay close attention to the BVDSS specification for the

MOSFETs as well.

Selection criteria for the power MOSFETs include the on

resistance, RDS(ON), Miller capacitance, CMILLER, input

voltage and maximum output current. Miller capacitance,

CMILLER, can be approximated from the gate charge curve

usually provided on the MOSFET manufacturers’ data

sheet. CMILLER is equal to the increase in gate charge

along the horizontal axis while the curve is approximately

flat divided by the specified change in VDS. This result is

then multiplied by the ratio of the application applied VDS

to the gate charge curve specified VDS. When the IC is

operating in continuous mode the duty cycles for the top

and bottom MOSFETs are given by:

Main Switch Duty Cycle

VOUT

VIN

Synchronous Switch Duty Cycle

VIN− VOUT

VIN

The MOSFET power dissipations at maximum output cur-

rent are given by:

PMAIN =

VOUT

VIN

IMAX

(

)

2 1+δ

(

)RDS(ON)+

VIN

( )

2 IMAX

⎛

⎝

⎜

⎞

⎠

⎟ RDR +RG

(

) CMILLER

(

) •

VINTVCC – VTHMIN

VTHMIN

⎡

⎣⎢

⎤

⎦⎥

( )

PSYNC =

VIN – VOUT

VIN

IMAX

(

)

2 1+δ

(

)RDS(ON)

where d is the temperature dependency of RDS(ON) ,RG

is the internal gate resistance of the MOSFET and RDR

(approximately 2Ω) is the effective driver resistance at the

MOSFET’s Miller threshold voltage. VTHMIN is the typical

MOSFET minimum threshold voltage.

Both MOSFETs have I2R losses while the topside N-channel

equation includes an additional term for transition losses,

which are highest at high input voltages and high switch-

ing frequencies. For VIN < 20V and frequencies less than

500KHz the high current efficiency generally improves

with larger MOSFETs, while for VIN > 20V and frequen-

cies above 500KHz the transition losses rapidly increase

to the point that the use of a higher RDS(ON) device with

lower CMILLER actually provides higher efficiency. The

synchronous MOSFET losses are greatest at high input

voltage when the top switch duty factor is low or during

a short-circuit when the synchronous switch is on close

to 100% of the period.

The term (1+ d) is generally given for a MOSFET in the

form of a normalized RDS(ON) vs Temperature curve, but

d = 0.005/°C can be used as an approximation for low

voltage MOSFETs.

APPLICATIONS INFORMATION

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