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LM7310 Datasheet(PDF) 17 Page - Texas Instruments |
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LM7310 Datasheet(HTML) 17 Page - Texas Instruments |
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17 / 44 page ![]() Figure 7-8. Reverse Current Blocking Performance During Fast Voltage Step at Output During slow voltage ramp at output, the linear ORing based reverse blocking mechanism ensures there's no DC current flow from OUT to IN, thereby avoiding input rail from getting slowly charged up to output voltage. Figure 7-9. Reverse Current Blocking Performance During Slow Voltage Ramp at Output When the input supply droops or gets disconnected while the output storage element (bulk capacitor or super capacitor) is charged to the full voltage, the linear ORing scheme minimizes the self-discharge from OUT to IN. This ensures maximum hold-up time for the output storage element in critical power back-up applications. It also prevents incorrect supply presence indication in applications which sense the input voltage to detect if the supply is connected. Figure 7-10. Reverse Current Blocking Performance During Input Supply Failure www.ti.com LM7310 SNOSDC0 – OCTOBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: LM7310 |
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