LM7310 datasheet(23/44 Pages) TI

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8.2.1.3 Detailed Design Procedure

8.2.1.3.1 Setting Undervoltage and Overvoltage Thresholds

The supply undervoltage and overvoltage thresholds are set using the resistors R1, R2 & R3 whose values can

be calculated using Equation 6 and Equation 7:

VIN(UV) =

VUVLO(R) x (R1 + R2 + R3)

R2 + R3

(6)

VIN(OV) =

VOV(R) x (R1 + R2 + R3)

(7)

Where VUVLO(R) is the UVLO rising threshold and VOV(R) is the OVLO rising threshold . Because R1, R2 and R3

leak the current from input supply VIN, these resistors must be selected based on the acceptable leakage current

from input power supply VIN. The current drawn by R1, R2 and R3 from the power supply is IR123 = VIN / (R1 +

R2 + R3). However, leakage currents due to external active components connected to the resistor string can add

error to these calculations. So, the resistor string current, IR123 must be chosen to be 20 times greater than the

leakage current expected on the EN/UVLO and OVLO pins.

From the device electrical specifications, both the EN/UVLO and OVLO leakage currents are 0.1 μA (max),

VOV(R) = 1.2 V and VUVLO(R) = 1.2 V. From design requirements, VIN(OV) = 13.2 V and VIN(UV) = 10.8 V. To solve

the equation, first choose the value of R1 = 470 kΩ and use the above equations to solve for R2 = 10.7 kΩ and

R3= 48 kΩ.

Using the closest standard 1% resistor values, we get R1 = 470 kΩ, R2 = 11 kΩ, and R3 = 47 kΩ.

8.2.1.3.2 Setting Output Voltage Rise Time (tR)

The slew rate (SR) needed to achieve the desired output rise time can be calculated as:

SR (V/ms) =

VIN (V)

tR (ms)

12 V

20 ms

= 0.6 V/ms

(8)

The CdVdt needed to achieve this slew rate can be calculated as:

CdVdt :pF; =

2000

SR :V/ms;

2000

0.6

= 3333 pF

(9)

Choose the nearest standard capacitor value as 3300 pF.

For this slew rate, the inrush current can be calculated as:

IINRUSH :mA; = SR (V/ms) x COUT :µF; = 0.6 x 470 = 282 mA

(10)

The average power dissipation inside the part during inrush can be calculated as:

PDINRUSH

:W; =

IINRUSH

:A; T VIN :8;

0.282 x 12

= 1.69 W

(11)

8.2.1.3.3 Setting Power Good Assertion Threshold

The Power Good assertion threshold can be set using the resistors R4 & R5 connected to the PGTH pin whose

values can be calculated as:

VPG =

VPGTH(R) x (R4 + R5)

(12)

Because R4 and R5 leak the current from the output rail VOUT, these resistors must be selected to minimize the

leakage current. The current drawn by R4 and R5 from the power supply is IR45 = VOUT / (R4 + R5). However,

leakage currents due to external active components connected to the resistor string can add error to these

calculations. So, the resistor string current, IR123 must be chosen to be 20 times greater than the PGTH

leakage current expected.

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LM7310

SNOSDC0 – OCTOBER 2020

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