LTC3129 datasheet(27/34 Pages) AD

27 / 34 page

LTC3114-1

Rev. D

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APPLICATIONS INFORMATION

Assuming the error amp zero is designed as just described,

at frequencies above P2 (and Z1), the closed-loop gain of

our system simplifies to:

GCL =

GCS •RLOAD • gm •RZ

VOUT

where:

GCS is the inner current loop closed-loop transconduc-

tance = 1.97A/V

RLOAD is the minimum load resistance in ohms

gm is the transconductance of the error amplifier, 120µS

RZ is the compensation zero setting resistor (one of

our design variables)

VOUT is the output voltage

Our desired closed-loop frequency (fCC) defined earlier is

29kHz. Assuming that we have a single pole response in

our system, we can express the ratio of the closed-loop

crossover frequency to fP1 in the buck mode of operation

as follows:

fCC

fP1

GCS •RLOAD • gm •Rz

We can now calculate RZ by rearranging the previous

equation:

RZ =

fCC • VOUT • 2π •COUT

GCS • gm

It’s important to note that the value of RZ is proportional

to the overall crossover frequency, fCC. If we later want to

adjust fCC lower, for example, RZ can be lowered in value

and CP1 increased proportionally to keep the compensa-

tion zero at the same frequency.

As mentioned previously, we will place the zero at fre-

quency P1, yielding:

CP1 =

π •RZ • fP1

or more simply,

RLOAD •COUT

where Rl is the minimum load resistance in buck mode,

12Ω in this example.

Quickly substituting our values in the above equations

yields:

RZ = 407k, CP1 = 1.3nF,

but please continue reading as this is not the final answer.

If the inner current loop were an ideal VCCS, then the pre-

viously derived compensation would be sufficient to stabi-

lize the converter. However, the inner current loop utilizes

an operational amplifier with an integral compensation

network, which contributes an additional zero and pole in

the power stage response, the gain peaking, as described

previously. The effect of the additional zero/pole pair

pushes out fCC, our crossover frequency, beyond what

was predicted by the previous calculations. A simplified

approach to calculating our compensation components

then is to re-use the previous equations but scale fCC, the

cross over frequency, by a scaling factor (

α), which will

account for the gain boost present in the system:

fCC′ =

fCC

•

( ), where α = 0.42

So, in our example, this results in:

fCC′ =

29kHz

• 0.42

(

) =4.06kHz

Using the new value of fCC′ in the previous equations for

RZ and CC yields:

RZ =

4.06kHz • 12V • 2

π • 44µF

1.97A

•

120µA

RZ = 56.9kΩ, use 56.2kΩ

CP1 =

Ω • 44µF

56.2k

CP1 = 9.4nF, use 10nF

CP2 is usually chosen to be a small value around 10pF as

it is meant to filter out high frequency switching frequency

related components.

Keep in mind that this analysis assumes that the zero pro-

vided by the output capacitor and its ESR is at a frequency

much higher than fCC.

LTC3129 Datasheet(PDF) 27 Page - Analog Devices

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