AT90PWM2 datasheet(126/365 Pages) ATMEL

126 / 365 page

126

AT90PWM2/3

4317B–AVR–02/05

Note:

1. A special case occurs when OCRnA/OCRnB equals TOP and COMnA1/COMnB1 is

set. In this case the compare match is ignored, but the set or clear is done at TOP.

See “Fast PWM Mode” on page 117. for more details.

Table 49 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the

phase correct or the phase and frequency correct, PWM mode.

Note:

1. A special case occurs when OCRnA/OCRnB equals TOP and COMnA1/COMnB1 is

set. See “Phase Correct PWM Mode” on page 119. for more details.

• Bit 1:0 – WGMn1:0: Waveform Generation Mode

Combined with the WGMn3:2 bits found in the TCCRnB Register, these bits control the

counting sequence of the counter, the source for maximum (TOP) counter value, and

what type of waveform generation to be used, see Table 50. Modes of operation sup-

ported by the Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare

match (CTC) mode, and three types of Pulse Width Modulation (PWM) modes. (See

“16-bit Timer/Counter1 with PWM” on page 104.).

Table 49. Compare Output Mode, Phase Correct and Phase and Frequency Correct

PWM(1)

COMnA1/COMnB

COMnA0/COMnB

Description

Normal port operation, OCnA/OCnB

disconnected.

WGMn3:0 = 8, 9 10 or 11: Toggle OCnA on

Compare Match, OCnB disconnected (normal

port operation). For all other WGM1 settings,

normal port operation, OC1A/OC1B

disconnected.

Clear OCnA/OCnB on Compare Match when up-

counting. Set OCnA/OCnB on Compare Match

when downcounting.

Set OCnA/OCnB on Compare Match when up-

counting. Clear OCnA/OCnB on Compare Match

when downcounting.

AT90PWM2 Datasheet(PDF) 126 Page - ATMEL Corporation