AT90PWM2 datasheet(128/365 Pages) ATMEL

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AT90PWM2/3

4317B–AVR–02/05

When the ICRn is used as TOP value (see description of the WGMn3:0 bits located in

the TCCRnA and the TCCRnB Register), the ICPn is disconnected and consequently

the Input Capture function is disabled.

• Bit 5 – Reserved Bit

This bit is reserved for future use. For ensuring compatibility with future devices, this bit

must be written to zero when TCCRnB is written.

• Bit 4:3 – WGMn3:2: Waveform Generation Mode

See TCCRnA Register description.

• Bit 2:0 – CSn2:0: Clock Select

The three Clock Select bits select the clock source to be used by the Timer/Counter, see

Figure 51 and Figure 52.

If external pin modes are used for the Timer/Countern, transitions on the Tn pin will

clock the counter even if the pin is configured as an output. This feature allows software

control of the counting.

Timer/Counter1 Control

• Bit 7 – FOCnA: Force Output Compare for Channel A

• Bit 6 – FOCnB: Force Output Compare for Channel B

The FOCnA/FOCnB bits are only active when the WGMn3:0 bits specifies a non-PWM

mode. However, for ensuring compatibility with future devices, these bits must be set to

zero when TCCRnA is written when operating in a PWM mode. When writing a logical

one to the FOCnA/FOCnB bit, an immediate compare match is forced on the Waveform

Generation unit. The OCnA/OCnB output is changed according to its COMnx1:0 bits

setting. Note that the FOCnA/FOCnB bits are implemented as strobes. Therefore it is

the value present in the COMnx1:0 bits that determine the effect of the forced compare.

A FOCnA/FOCnB strobe will not generate any interrupt nor will it clear the timer in Clear

Timer on Compare match (CTC) mode using OCRnA as TOP.

The FOCnA/FOCnB bits are always read as zero.

Table 51. Clock Select Bit Description

CSn2

CSn1

CSn0

Description

No clock source (Timer/Counter stopped).

001

clk

I/O/1 (No prescaling)

010

clk

I/O/8 (From prescaler)

011

clk

I/O/64 (From prescaler)

100

clk

I/O/256 (From prescaler)

101

clk

I/O/1024 (From prescaler)

External clock source on Tn pin. Clock on falling edge.

External clock source on Tn pin. Clock on rising edge.

Bit

765

FOC1A

FOC1B

–

TCCR1C

Read/Write

R/W

Initial Value

AT90PWM2 Datasheet(PDF) 128 Page - ATMEL Corporation

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