AT90PWM2 datasheet(231/365 Pages) ATMEL

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231

AT90PWM2/3

4317B–AVR–02/05

UDR/EUDR data access from

13 to 17 bits per character

When the EUSART is used in 13, 14, 15, 16 or 17 bits per character mode, the

EUDR/UDR registers are used in combinaison with the RxB8/TxB8 bit for data access.

For 13, 14, 15 or 16 bit character the upper unused bits in EUDR will be ignored by the

Transmitter and set to zero by the Receiver. In transmitter mode, the data should be

written MSB first. The data transmission starts when the UDR register is written.

In these modes, the RxB8/TxB8 registers are not used.

Figure 112. 13, 14, 15 and 16 bits communication data access

For 17 bit character the seventeenth bit is locate in RxB8 or TXB8 register. In transmitter

mode, the data should be written MSB first. The data transmission starts when the UDR

Figure 113. 17 bits communication data access

EUSART Control and Status

• Bit 7:4 – EUSART Transmit Character Size

Data 15:0

UDR

EUDR

Data 16:0

UDR

EUDR

RxB8 (receive)

or TxB8 (transmit)

Bit

765

432

UTxS3

UTxS2

UTxS1

UTxS0

UTxS3

URxS2

URxS1

URxS0

EUCSRA

Read/Write

R/W

Initial Value

001

100

AT90PWM2 Datasheet(PDF) 231 Page - ATMEL Corporation

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