AT90PWM2 datasheet(240/365 Pages) ATMEL

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AT90PWM2/3

4317B–AVR–02/05

• Bit 6– AC2IE: Analog Comparator 2 Interrupt Enable bit

Set this bit to enable the analog comparator 2 interrupt.

Clear this bit to disable the analog comparator 2 interrupt.

• Bit 5, 4– AC2IS1, AC2IS0: Analog Comparator 2 Interrupt Select bit

These 2 bits determine the sensitivity of the interrupt trigger.

The different setting are shown in Table 92.

• Bit 2, 1, 0– AC2M2, AC2M1, AC2M0: Analog Comparator 2 Multiplexer register

These 3 bits determine the input of the negative input of the analog comparator.

The different setting are shown in Table 97.

Analog Comparator Status

• Bit 7– ACCKDIV: Analog Comparator Clock Divider

The analog comparators can work with a clock up to 8MHz.

Set this bit in case the clock frequency of the microcontroller is higher than 8 MHz to

insert a divider by 2 between the clock of the microcontroller and the clock of the analog

comparators.

Clear this bit to have the same clock frequency for the microcontroller and the analog

comparators.

• Bit 6– AC2IF: Analog Comparator 2 Interrupt Flag Bit

This bit is set by hardware when comparator 2 output event triggers off the interrupt

mode defined by AC2IS1 and AC2IS0 bits in AC2CON register.

This bit is cleared by hardware when the corresponding interrupt vector is executed in

Table 96. Interrupt sensitivity selection

AC2IS1

AC2IS0

Description

Comparator Interrupt on output toggle

Reserved

Comparator interrupt on output falling edge

Comparator interrupt on output rising edge

Table 97. Analog Comparator 2 negative input selection

AC2M2

AC2M1

AC2M0

Description

“Vref”/6.40

“Vref”/3.20

“Vref”/2.13

“Vref”/1.60

Analog Comparator Negative Input (ACMPM pin)

DAC result

Reserved

Bit

ACCKDIV

AC2IF

AC1IF

AC0IF

AC2O

AC1O

AC0O

ACSR

Read/Write

Initial Value

AT90PWM2 Datasheet(PDF) 240 Page - ATMEL Corporation

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