AT90PWM2 datasheet(281/365 Pages) ATMEL

281 / 365 page

281

AT90PWM2/3

4317B–AVR–02/05

Performing Page Erase by

SPM

To execute Page Erase, set up the address in the Z-pointer, write “X0000011” to

SPMCSR and execute SPM within four clock cycles after writing SPMCSR. The data in

R1 and R0 is ignored. The page address must be written to PCPAGE in the Z-register.

Other bits in the Z-pointer will be ignored during this operation.

•

Page Erase to the RWW section: The NRWW section can be read during the Page

Erase.

•

Page Erase to the NRWW section: The CPU is halted during the operation.

Filling the Temporary Buffer

(Page Loading)

To write an instruction word, set up the address in the Z-pointer and data in R1:R0, write

“00000001” to SPMCSR and execute SPM within four clock cycles after writing

SPMCSR. The content of PCWORD in the Z-register is used to address the data in the

temporary buffer. The temporary buffer will auto-erase after a Page Write operation or

by writing the RWWSRE bit in SPMCSR. It is also erased after a system reset. Note that

it is not possible to write more than one time to each address without erasing the tempo-

rary buffer.

If the EEPROM is written in the middle of an SPM Page Load operation, all data loaded

will be lost.

Performing a Page Write

To execute Page Write, set up the address in the Z-pointer, write “X0000101” to

SPMCSR and execute SPM within four clock cycles after writing SPMCSR. The data in

R1 and R0 is ignored. The page address must be written to PCPAGE. Other bits in the

Z-pointer must be written to zero during this operation.

•

Page Write to the RWW section: The NRWW section can be read during the Page

Write.

•

Page Write to the NRWW section: The CPU is halted during the operation.

Using the SPM Interrupt

If the SPM interrupt is enabled, the SPM interrupt will generate a constant interrupt

when the SELFPRGEN bit in SPMCSR is cleared. This means that the interrupt can be

used instead of polling the SPMCSR Register in software. When using the SPM inter-

rupt, the Interrupt Vectors should be moved to the BLS section to avoid that an interrupt

is accessing the RWW section when it is blocked for reading. How to move the inter-

rupts is described in XXXXXXXX.

Consideration While Updating

BLS

Special care must be taken if the user allows the Boot Loader section to be updated by

leaving Boot Lock bit11 unprogrammed. An accidental write to the Boot Loader itself can

corrupt the entire Boot Loader, and further software updates might be impossible. If it is

not necessary to change the Boot Loader software itself, it is recommended to program

the Boot Lock bit11 to protect the Boot Loader software from any internal software

changes.

Prevent Reading the RWW

Section During Self-

Programming

During Self-Programming (either Page Erase or Page Write), the RWW section is

always blocked for reading. The user software itself must prevent that this section is

addressed during the self programming operation. The RWWSB in the SPMCSR will be

set as long as the RWW section is busy. During Self-Programming the Interrupt Vector

table should be moved to the BLS as described in XXXXXXX, or the interrupts must be

disabled. Before addressing the RWW section after the programming is completed, the

user software must clear the RWWSB by writing the RWWSRE. See “Simple Assembly

Code Example for a Boot Loader” on page 284 for an example.

AT90PWM2 Datasheet(PDF) 281 Page - ATMEL Corporation

AT90PWM2 Datasheet(HTML) 281 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL